1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/bridge/ti,tfp410.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: TFP410 DPI to DVI encoder 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Tomi Valkeinen <tomi.valkeinen@ti.com> 11*4882a593Smuzhiyun - Jyri Sarha <jsarha@ti.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun compatible: 15*4882a593Smuzhiyun const: ti,tfp410 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun reg: 18*4882a593Smuzhiyun description: I2C address of the device. 19*4882a593Smuzhiyun maxItems: 1 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun powerdown-gpios: 22*4882a593Smuzhiyun maxItems: 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun ti,deskew: 25*4882a593Smuzhiyun description: 26*4882a593Smuzhiyun Data de-skew value in 350ps increments, from 0 to 7, as configured 27*4882a593Smuzhiyun through the DK[3:1] pins. The de-skew multiplier is computed as 28*4882a593Smuzhiyun (DK[3:1] - 4), so it ranges from -4 to 3. 29*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 30*4882a593Smuzhiyun minimum: 0 31*4882a593Smuzhiyun maximum: 7 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun ports: 34*4882a593Smuzhiyun description: 35*4882a593Smuzhiyun A node containing input and output port nodes with endpoint 36*4882a593Smuzhiyun definitions as documented in 37*4882a593Smuzhiyun Documentation/devicetree/bindings/media/video-interfaces.txt 38*4882a593Smuzhiyun type: object 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun properties: 41*4882a593Smuzhiyun port@0: 42*4882a593Smuzhiyun description: DPI input port. 43*4882a593Smuzhiyun type: object 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun properties: 46*4882a593Smuzhiyun reg: 47*4882a593Smuzhiyun const: 0 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun endpoint: 50*4882a593Smuzhiyun type: object 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun properties: 53*4882a593Smuzhiyun pclk-sample: 54*4882a593Smuzhiyun description: 55*4882a593Smuzhiyun Endpoint sampling edge. 56*4882a593Smuzhiyun enum: 57*4882a593Smuzhiyun - 0 # Falling edge 58*4882a593Smuzhiyun - 1 # Rising edge 59*4882a593Smuzhiyun default: 0 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun bus-width: 62*4882a593Smuzhiyun description: 63*4882a593Smuzhiyun Endpoint bus width. 64*4882a593Smuzhiyun enum: 65*4882a593Smuzhiyun - 12 # 12 data lines connected and dual-edge mode 66*4882a593Smuzhiyun - 24 # 24 data lines connected and single-edge mode 67*4882a593Smuzhiyun default: 24 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun port@1: 70*4882a593Smuzhiyun description: DVI output port. 71*4882a593Smuzhiyun type: object 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun properties: 74*4882a593Smuzhiyun reg: 75*4882a593Smuzhiyun const: 1 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun endpoint: 78*4882a593Smuzhiyun type: object 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun required: 81*4882a593Smuzhiyun - port@0 82*4882a593Smuzhiyun - port@1 83*4882a593Smuzhiyun 84*4882a593Smuzhiyunrequired: 85*4882a593Smuzhiyun - compatible 86*4882a593Smuzhiyun - ports 87*4882a593Smuzhiyun 88*4882a593Smuzhiyunif: 89*4882a593Smuzhiyun required: 90*4882a593Smuzhiyun - reg 91*4882a593Smuzhiyunthen: 92*4882a593Smuzhiyun properties: 93*4882a593Smuzhiyun ti,deskew: false 94*4882a593Smuzhiyunelse: 95*4882a593Smuzhiyun required: 96*4882a593Smuzhiyun - ti,deskew 97*4882a593Smuzhiyun 98*4882a593SmuzhiyunadditionalProperties: false 99*4882a593Smuzhiyun 100*4882a593Smuzhiyunexamples: 101*4882a593Smuzhiyun - | 102*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun tfp410: encoder { 105*4882a593Smuzhiyun compatible = "ti,tfp410"; 106*4882a593Smuzhiyun powerdown-gpios = <&twl_gpio 2 GPIO_ACTIVE_LOW>; 107*4882a593Smuzhiyun ti,deskew = <3>; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun ports { 110*4882a593Smuzhiyun #address-cells = <1>; 111*4882a593Smuzhiyun #size-cells = <0>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun port@0 { 114*4882a593Smuzhiyun reg = <0>; 115*4882a593Smuzhiyun tfp410_in: endpoint { 116*4882a593Smuzhiyun pclk-sample = <1>; 117*4882a593Smuzhiyun bus-width = <24>; 118*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun port@1 { 123*4882a593Smuzhiyun reg = <1>; 124*4882a593Smuzhiyun tfp410_out: endpoint { 125*4882a593Smuzhiyun remote-endpoint = <&dvi_connector_in>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun... 132