1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Synopsys DesignWare MIPI DSI host controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Philippe CORNU <philippe.cornu@st.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun This document defines device tree properties for the Synopsys DesignWare MIPI 14*4882a593Smuzhiyun DSI host controller. It doesn't constitue a device tree binding specification 15*4882a593Smuzhiyun by itself but is meant to be referenced by platform-specific device tree 16*4882a593Smuzhiyun bindings. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun When referenced from platform device tree bindings the properties defined in 19*4882a593Smuzhiyun this document are defined as follows. The platform device tree bindings are 20*4882a593Smuzhiyun responsible for defining whether each property is required or optional. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunallOf: 23*4882a593Smuzhiyun - $ref: ../dsi-controller.yaml# 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunproperties: 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun maxItems: 1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun clocks: 30*4882a593Smuzhiyun items: 31*4882a593Smuzhiyun - description: Module clock 32*4882a593Smuzhiyun - description: DSI bus clock for either AHB and APB 33*4882a593Smuzhiyun - description: Pixel clock for the DPI/RGB input 34*4882a593Smuzhiyun minItems: 2 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun clock-names: 37*4882a593Smuzhiyun items: 38*4882a593Smuzhiyun - const: ref 39*4882a593Smuzhiyun - const: pclk 40*4882a593Smuzhiyun - const: px_clk 41*4882a593Smuzhiyun minItems: 2 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun resets: 44*4882a593Smuzhiyun maxItems: 1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun reset-names: 47*4882a593Smuzhiyun const: apb 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun ports: 50*4882a593Smuzhiyun type: object 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun properties: 53*4882a593Smuzhiyun port@0: 54*4882a593Smuzhiyun type: object 55*4882a593Smuzhiyun description: Input node to receive pixel data. 56*4882a593Smuzhiyun port@1: 57*4882a593Smuzhiyun type: object 58*4882a593Smuzhiyun description: DSI output node to panel. 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun required: 61*4882a593Smuzhiyun - port@0 62*4882a593Smuzhiyun - port@1 63*4882a593Smuzhiyun 64*4882a593Smuzhiyunrequired: 65*4882a593Smuzhiyun - clock-names 66*4882a593Smuzhiyun - clocks 67*4882a593Smuzhiyun - ports 68*4882a593Smuzhiyun - reg 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunadditionalProperties: true 71