1*4882a593SmuzhiyunSilicon Image SiI8620 HDMI/MHL bridge bindings 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible: "sil,sii8620" 5*4882a593Smuzhiyun - reg: i2c address of the bridge 6*4882a593Smuzhiyun - cvcc10-supply: Digital Core Supply Voltage (1.0V) 7*4882a593Smuzhiyun - iovcc18-supply: I/O Supply Voltage (1.8V) 8*4882a593Smuzhiyun - interrupts: interrupt specifier of INT pin 9*4882a593Smuzhiyun - reset-gpios: gpio specifier of RESET pin 10*4882a593Smuzhiyun - clocks, clock-names: specification and name of "xtal" clock 11*4882a593Smuzhiyun - video interfaces: Device node can contain video interface port 12*4882a593Smuzhiyun node for HDMI encoder according to [1]. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun[1]: Documentation/devicetree/bindings/media/video-interfaces.txt 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyun sii8620@39 { 18*4882a593Smuzhiyun reg = <0x39>; 19*4882a593Smuzhiyun compatible = "sil,sii8620"; 20*4882a593Smuzhiyun cvcc10-supply = <&ldo36_reg>; 21*4882a593Smuzhiyun iovcc18-supply = <&ldo34_reg>; 22*4882a593Smuzhiyun interrupt-parent = <&gpf0>; 23*4882a593Smuzhiyun interrupts = <2 0>; 24*4882a593Smuzhiyun reset-gpio = <&gpv7 0 0>; 25*4882a593Smuzhiyun clocks = <&pmu_system_controller 0>; 26*4882a593Smuzhiyun clock-names = "xtal"; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun port { 29*4882a593Smuzhiyun mhl_to_hdmi: endpoint { 30*4882a593Smuzhiyun remote-endpoint = <&hdmi_to_mhl>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34