1*4882a593SmuzhiyunRockchip RK1000 TVEncoder 2*4882a593Smuzhiyun------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThe RK1000-TVE are RK1000 TV Encoder register block. 5*4882a593SmuzhiyunThe chip is connected to an i2c bus. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- compatible: should be "rockchip,rk1000-tve" 10*4882a593Smuzhiyun- reg: I2C slave address 11*4882a593Smuzhiyun- rockchip,data-width: should be <18> or <24> 12*4882a593Smuzhiyun- rockchip,output: This describes the output face 13*4882a593Smuzhiyun- rockchip,ctl: phandle to the rk1000 core controller 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun- rockchip,tvemode: tve preferred mode, 0 for PAL, 1 for NTSC 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunRequired node: 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunThe rk1000 tve has one video port. its connection is modeled using the OF 22*4882a593Smuzhiyungraph binding specified in Documentation/devicetree/bindings/graph.txt. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- Video port 0 for LVDS input 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunExample 28*4882a593Smuzhiyun------- 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun rk1000-tve@42 { 31*4882a593Smuzhiyun status = "okay"; 32*4882a593Smuzhiyun compatible = "rockchip,rk1000-tve"; 33*4882a593Smuzhiyun reg = <0x42>; 34*4882a593Smuzhiyun rockchip,data-width = <24>; 35*4882a593Smuzhiyun rockchip,output = "rgb"; 36*4882a593Smuzhiyun rockchip,ctl = <&rk1000_ctl>; 37*4882a593Smuzhiyun rockchip,tvemode = <0>; 38*4882a593Smuzhiyun ports { 39*4882a593Smuzhiyun #address-cells = <1>; 40*4882a593Smuzhiyun #size-cells = <0>; 41*4882a593Smuzhiyun tve_in: port@0 { 42*4882a593Smuzhiyun reg = <0>; 43*4882a593Smuzhiyun tve_in_lvds: endpoint { 44*4882a593Smuzhiyun remote-endpoint = <&lvds_out_tve>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49