1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/bridge/ite,it6505.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: ITE it6505 Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Allen Chen <allen.chen@ite.com.tw> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun The IT6505 is a high-performance DisplayPort 1.1a transmitter, 14*4882a593Smuzhiyun fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications. 15*4882a593Smuzhiyun The IT6505 supports color depth of up to 36 bits (12 bits/color) 16*4882a593Smuzhiyun and ensures robust transmission of high-quality uncompressed video 17*4882a593Smuzhiyun content, along with uncompressed and compressed digital audio content. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun Aside from the various video output formats supported, the IT6505 20*4882a593Smuzhiyun also encodes and transmits up to 8 channels of I2S digital audio, 21*4882a593Smuzhiyun with sampling rate up to 192kHz and sample size up to 24 bits. 22*4882a593Smuzhiyun In addition, an S/PDIF input port takes in compressed audio of up to 23*4882a593Smuzhiyun 192kHz frame rate. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun Each IT6505 chip comes preprogrammed with an unique HDCP key, 26*4882a593Smuzhiyun in compliance with the HDCP 1.3 standard so as to provide secure 27*4882a593Smuzhiyun transmission of high-definition content. Users of the IT6505 need not 28*4882a593Smuzhiyun purchase any HDCP keys or ROMs. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunproperties: 31*4882a593Smuzhiyun compatible: 32*4882a593Smuzhiyun const: ite,it6505 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun reg: 35*4882a593Smuzhiyun maxItems: 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun ovdd-supply: 38*4882a593Smuzhiyun maxItems: 1 39*4882a593Smuzhiyun description: I/O voltage 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun pwr18-supply: 42*4882a593Smuzhiyun maxItems: 1 43*4882a593Smuzhiyun description: core voltage 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun interrupts: 46*4882a593Smuzhiyun maxItems: 1 47*4882a593Smuzhiyun description: interrupt specifier of INT pin 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun reset-gpios: 50*4882a593Smuzhiyun maxItems: 1 51*4882a593Smuzhiyun description: gpio specifier of RESET pin 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun extcon: 54*4882a593Smuzhiyun maxItems: 1 55*4882a593Smuzhiyun description: extcon specifier for the Power Delivery 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun port: 58*4882a593Smuzhiyun type: object 59*4882a593Smuzhiyun description: A port node pointing to DPI host port node 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunrequired: 62*4882a593Smuzhiyun - compatible 63*4882a593Smuzhiyun - ovdd-supply 64*4882a593Smuzhiyun - pwr18-supply 65*4882a593Smuzhiyun - interrupts 66*4882a593Smuzhiyun - reset-gpios 67*4882a593Smuzhiyun - extcon 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunadditionalProperties: false 70*4882a593Smuzhiyun 71*4882a593Smuzhiyunexamples: 72*4882a593Smuzhiyun - | 73*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun i2c { 76*4882a593Smuzhiyun #address-cells = <1>; 77*4882a593Smuzhiyun #size-cells = <0>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun dp-bridge@5c { 80*4882a593Smuzhiyun compatible = "ite,it6505"; 81*4882a593Smuzhiyun interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>; 82*4882a593Smuzhiyun reg = <0x5c>; 83*4882a593Smuzhiyun pinctrl-names = "default"; 84*4882a593Smuzhiyun pinctrl-0 = <&it6505_pins>; 85*4882a593Smuzhiyun ovdd-supply = <&mt6358_vsim1_reg>; 86*4882a593Smuzhiyun pwr18-supply = <&it6505_pp18_reg>; 87*4882a593Smuzhiyun reset-gpios = <&pio 179 1>; 88*4882a593Smuzhiyun extcon = <&usbc_extcon>; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun port { 91*4882a593Smuzhiyun it6505_in: endpoint { 92*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97