1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Broadcom VC4 (VideoCore4) HDMI Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Eric Anholt <eric@anholt.net> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun const: brcm,bcm2835-hdmi 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun reg: 17*4882a593Smuzhiyun items: 18*4882a593Smuzhiyun - description: HDMI register range 19*4882a593Smuzhiyun - description: HD register range 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun interrupts: 22*4882a593Smuzhiyun minItems: 2 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun clocks: 25*4882a593Smuzhiyun items: 26*4882a593Smuzhiyun - description: The pixel clock 27*4882a593Smuzhiyun - description: The HDMI state machine clock 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun clock-names: 30*4882a593Smuzhiyun items: 31*4882a593Smuzhiyun - const: pixel 32*4882a593Smuzhiyun - const: hdmi 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun ddc: 35*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle 36*4882a593Smuzhiyun description: > 37*4882a593Smuzhiyun Phandle of the I2C controller used for DDC EDID probing 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun hpd-gpios: 40*4882a593Smuzhiyun description: > 41*4882a593Smuzhiyun The GPIO pin for the HDMI hotplug detect (if it doesn't appear 42*4882a593Smuzhiyun as an interrupt/status bit in the HDMI controller itself) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun dmas: 45*4882a593Smuzhiyun maxItems: 1 46*4882a593Smuzhiyun description: > 47*4882a593Smuzhiyun Should contain one entry pointing to the DMA channel used to 48*4882a593Smuzhiyun transfer audio data. 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun dma-names: 51*4882a593Smuzhiyun const: audio-rx 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunrequired: 54*4882a593Smuzhiyun - compatible 55*4882a593Smuzhiyun - reg 56*4882a593Smuzhiyun - interrupts 57*4882a593Smuzhiyun - clocks 58*4882a593Smuzhiyun - ddc 59*4882a593Smuzhiyun 60*4882a593SmuzhiyunadditionalProperties: false 61*4882a593Smuzhiyun 62*4882a593Smuzhiyunexamples: 63*4882a593Smuzhiyun - | 64*4882a593Smuzhiyun #include <dt-bindings/clock/bcm2835.h> 65*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun hdmi: hdmi@7e902000 { 68*4882a593Smuzhiyun compatible = "brcm,bcm2835-hdmi"; 69*4882a593Smuzhiyun reg = <0x7e902000 0x600>, 70*4882a593Smuzhiyun <0x7e808000 0x100>; 71*4882a593Smuzhiyun interrupts = <2 8>, <2 9>; 72*4882a593Smuzhiyun ddc = <&i2c2>; 73*4882a593Smuzhiyun hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; 74*4882a593Smuzhiyun clocks = <&clocks BCM2835_PLLH_PIX>, 75*4882a593Smuzhiyun <&clocks BCM2835_CLOCK_HSM>; 76*4882a593Smuzhiyun clock-names = "pixel", "hdmi"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun... 80