xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Broadcom BCM2711 HDMI Controller Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Eric Anholt <eric@anholt.net>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunproperties:
13*4882a593Smuzhiyun  compatible:
14*4882a593Smuzhiyun    enum:
15*4882a593Smuzhiyun      - brcm,bcm2711-hdmi0
16*4882a593Smuzhiyun      - brcm,bcm2711-hdmi1
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun  reg:
19*4882a593Smuzhiyun    items:
20*4882a593Smuzhiyun      - description: HDMI controller register range
21*4882a593Smuzhiyun      - description: DVP register range
22*4882a593Smuzhiyun      - description: HDMI PHY register range
23*4882a593Smuzhiyun      - description: Rate Manager register range
24*4882a593Smuzhiyun      - description: Packet RAM register range
25*4882a593Smuzhiyun      - description: Metadata RAM register range
26*4882a593Smuzhiyun      - description: CSC register range
27*4882a593Smuzhiyun      - description: CEC register range
28*4882a593Smuzhiyun      - description: HD register range
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  reg-names:
31*4882a593Smuzhiyun    items:
32*4882a593Smuzhiyun      - const: hdmi
33*4882a593Smuzhiyun      - const: dvp
34*4882a593Smuzhiyun      - const: phy
35*4882a593Smuzhiyun      - const: rm
36*4882a593Smuzhiyun      - const: packet
37*4882a593Smuzhiyun      - const: metadata
38*4882a593Smuzhiyun      - const: csc
39*4882a593Smuzhiyun      - const: cec
40*4882a593Smuzhiyun      - const: hd
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun  clocks:
43*4882a593Smuzhiyun    items:
44*4882a593Smuzhiyun      - description: The HDMI state machine clock
45*4882a593Smuzhiyun      - description: The Pixel BVB clock
46*4882a593Smuzhiyun      - description: The HDMI Audio parent clock
47*4882a593Smuzhiyun      - description: The HDMI CEC parent clock
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  clock-names:
50*4882a593Smuzhiyun    items:
51*4882a593Smuzhiyun      - const: hdmi
52*4882a593Smuzhiyun      - const: bvb
53*4882a593Smuzhiyun      - const: audio
54*4882a593Smuzhiyun      - const: cec
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  ddc:
57*4882a593Smuzhiyun    allOf:
58*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/phandle
59*4882a593Smuzhiyun    description: >
60*4882a593Smuzhiyun      Phandle of the I2C controller used for DDC EDID probing
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun  hpd-gpios:
63*4882a593Smuzhiyun    description: >
64*4882a593Smuzhiyun      The GPIO pin for the HDMI hotplug detect (if it doesn't appear
65*4882a593Smuzhiyun      as an interrupt/status bit in the HDMI controller itself)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun  dmas:
68*4882a593Smuzhiyun    maxItems: 1
69*4882a593Smuzhiyun    description: >
70*4882a593Smuzhiyun      Should contain one entry pointing to the DMA channel used to
71*4882a593Smuzhiyun      transfer audio data.
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun  dma-names:
74*4882a593Smuzhiyun    const: audio-rx
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun  resets:
77*4882a593Smuzhiyun    maxItems: 1
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun  wifi-2.4ghz-coexistence:
80*4882a593Smuzhiyun    type: boolean
81*4882a593Smuzhiyun    description: >
82*4882a593Smuzhiyun      Should the pixel frequencies in the WiFi frequencies range be
83*4882a593Smuzhiyun      avoided?
84*4882a593Smuzhiyun
85*4882a593Smuzhiyunrequired:
86*4882a593Smuzhiyun  - compatible
87*4882a593Smuzhiyun  - reg
88*4882a593Smuzhiyun  - reg-names
89*4882a593Smuzhiyun  - clocks
90*4882a593Smuzhiyun  - resets
91*4882a593Smuzhiyun  - ddc
92*4882a593Smuzhiyun
93*4882a593SmuzhiyunadditionalProperties: false
94*4882a593Smuzhiyun
95*4882a593Smuzhiyunexamples:
96*4882a593Smuzhiyun  - |
97*4882a593Smuzhiyun    hdmi0: hdmi@7ef00700 {
98*4882a593Smuzhiyun        compatible = "brcm,bcm2711-hdmi0";
99*4882a593Smuzhiyun        reg = <0x7ef00700 0x300>,
100*4882a593Smuzhiyun              <0x7ef00300 0x200>,
101*4882a593Smuzhiyun              <0x7ef00f00 0x80>,
102*4882a593Smuzhiyun              <0x7ef00f80 0x80>,
103*4882a593Smuzhiyun              <0x7ef01b00 0x200>,
104*4882a593Smuzhiyun              <0x7ef01f00 0x400>,
105*4882a593Smuzhiyun              <0x7ef00200 0x80>,
106*4882a593Smuzhiyun              <0x7ef04300 0x100>,
107*4882a593Smuzhiyun              <0x7ef20000 0x100>;
108*4882a593Smuzhiyun        reg-names = "hdmi",
109*4882a593Smuzhiyun                    "dvp",
110*4882a593Smuzhiyun                    "phy",
111*4882a593Smuzhiyun                    "rm",
112*4882a593Smuzhiyun                    "packet",
113*4882a593Smuzhiyun                    "metadata",
114*4882a593Smuzhiyun                    "csc",
115*4882a593Smuzhiyun                    "cec",
116*4882a593Smuzhiyun                    "hd";
117*4882a593Smuzhiyun        clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
118*4882a593Smuzhiyun        clock-names = "hdmi", "bvb", "audio", "cec";
119*4882a593Smuzhiyun        resets = <&dvp 0>;
120*4882a593Smuzhiyun        ddc = <&ddc0>;
121*4882a593Smuzhiyun    };
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun...
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