xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun# Copyright 2019 BayLibre, SAS
3*4882a593Smuzhiyun%YAML 1.2
4*4882a593Smuzhiyun---
5*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
6*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyuntitle: Amlogic Meson Display Controller
9*4882a593Smuzhiyun
10*4882a593Smuzhiyunmaintainers:
11*4882a593Smuzhiyun  - Neil Armstrong <narmstrong@baylibre.com>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |
14*4882a593Smuzhiyun  The Amlogic Meson Display controller is composed of several components
15*4882a593Smuzhiyun  that are going to be documented below
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
18*4882a593Smuzhiyun     | vd1   _______     _____________    _________________     |               |
19*4882a593Smuzhiyun  D  |-------|      |----|            |   |                |    |   HDMI PLL    |
20*4882a593Smuzhiyun  D  | vd2   | VIU  |    | Video Post |   | Video Encoders |<---|-----VCLK      |
21*4882a593Smuzhiyun  R  |-------|      |----| Processing |   |                |    |               |
22*4882a593Smuzhiyun     | osd2  |      |    |            |---| Enci ----------|----|-----VDAC------|
23*4882a593Smuzhiyun  R  |-------| CSC  |----| Scalers    |   | Encp ----------|----|----HDMI-TX----|
24*4882a593Smuzhiyun  A  | osd1  |      |    | Blenders   |   | Encl ----------|----|---------------|
25*4882a593Smuzhiyun  M  |-------|______|----|____________|   |________________|    |               |
26*4882a593Smuzhiyun  ___|__________________________________________________________|_______________|
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  VIU: Video Input Unit
30*4882a593Smuzhiyun  ---------------------
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  The Video Input Unit is in charge of the pixel scanout from the DDR memory.
33*4882a593Smuzhiyun  It fetches the frames addresses, stride and parameters from the "Canvas" memory.
34*4882a593Smuzhiyun  This part is also in charge of the CSC (Colorspace Conversion).
35*4882a593Smuzhiyun  It can handle 2 OSD Planes and 2 Video Planes.
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  VPP: Video Post Processing
38*4882a593Smuzhiyun  --------------------------
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  The Video Post Processing is in charge of the scaling and blending of the
41*4882a593Smuzhiyun  various planes into a single pixel stream.
42*4882a593Smuzhiyun  There is a special "pre-blending" used by the video planes with a dedicated
43*4882a593Smuzhiyun  scaler and a "post-blending" to merge with the OSD Planes.
44*4882a593Smuzhiyun  The OSD planes also have a dedicated scaler for one of the OSD.
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  VENC: Video Encoders
47*4882a593Smuzhiyun  --------------------
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  The VENC is composed of the multiple pixel encoders
50*4882a593Smuzhiyun   - ENCI : Interlace Video encoder for CVBS and Interlace HDMI
51*4882a593Smuzhiyun   - ENCP : Progressive Video Encoder for HDMI
52*4882a593Smuzhiyun   - ENCL : LCD LVDS Encoder
53*4882a593Smuzhiyun  The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
54*4882a593Smuzhiyun  tree and provides the scanout clock to the VPP and VIU.
55*4882a593Smuzhiyun  The ENCI is connected to a single VDAC for Composite Output.
56*4882a593Smuzhiyun  The ENCI and ENCP are connected to an on-chip HDMI Transceiver.
57*4882a593Smuzhiyun
58*4882a593Smuzhiyunproperties:
59*4882a593Smuzhiyun  compatible:
60*4882a593Smuzhiyun    oneOf:
61*4882a593Smuzhiyun      - items:
62*4882a593Smuzhiyun          - enum:
63*4882a593Smuzhiyun              - amlogic,meson-gxbb-vpu # GXBB (S905)
64*4882a593Smuzhiyun              - amlogic,meson-gxl-vpu # GXL (S905X, S905D)
65*4882a593Smuzhiyun              - amlogic,meson-gxm-vpu # GXM (S912)
66*4882a593Smuzhiyun          - const: amlogic,meson-gx-vpu
67*4882a593Smuzhiyun      - enum:
68*4882a593Smuzhiyun          - amlogic,meson-g12a-vpu # G12A (S905X2, S905Y2, S905D2)
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun  reg:
71*4882a593Smuzhiyun    maxItems: 2
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun  reg-names:
74*4882a593Smuzhiyun    items:
75*4882a593Smuzhiyun      - const: vpu
76*4882a593Smuzhiyun      - const: hhi
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun  interrupts:
79*4882a593Smuzhiyun    maxItems: 1
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun  amlogic,canvas:
82*4882a593Smuzhiyun    description: should point to a canvas provider node
83*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun  power-domains:
86*4882a593Smuzhiyun    maxItems: 1
87*4882a593Smuzhiyun    description: phandle to the associated power domain
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun  port@0:
90*4882a593Smuzhiyun    type: object
91*4882a593Smuzhiyun    description:
92*4882a593Smuzhiyun      A port node pointing to the CVBS VDAC port node.
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun  port@1:
95*4882a593Smuzhiyun    type: object
96*4882a593Smuzhiyun    description:
97*4882a593Smuzhiyun      A port node pointing to the HDMI-TX port node.
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun  "#address-cells":
100*4882a593Smuzhiyun    const: 1
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun  "#size-cells":
103*4882a593Smuzhiyun    const: 0
104*4882a593Smuzhiyun
105*4882a593Smuzhiyunrequired:
106*4882a593Smuzhiyun  - compatible
107*4882a593Smuzhiyun  - reg
108*4882a593Smuzhiyun  - interrupts
109*4882a593Smuzhiyun  - port@0
110*4882a593Smuzhiyun  - port@1
111*4882a593Smuzhiyun  - "#address-cells"
112*4882a593Smuzhiyun  - "#size-cells"
113*4882a593Smuzhiyun  - amlogic,canvas
114*4882a593Smuzhiyun
115*4882a593SmuzhiyunadditionalProperties: false
116*4882a593Smuzhiyun
117*4882a593Smuzhiyunexamples:
118*4882a593Smuzhiyun  - |
119*4882a593Smuzhiyun    vpu: vpu@d0100000 {
120*4882a593Smuzhiyun        compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
121*4882a593Smuzhiyun        reg = <0xd0100000 0x100000>, <0xc883c000 0x1000>;
122*4882a593Smuzhiyun        reg-names = "vpu", "hhi";
123*4882a593Smuzhiyun        interrupts = <3>;
124*4882a593Smuzhiyun        #address-cells = <1>;
125*4882a593Smuzhiyun        #size-cells = <0>;
126*4882a593Smuzhiyun        amlogic,canvas = <&canvas>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun        /* CVBS VDAC output port */
129*4882a593Smuzhiyun        port@0 {
130*4882a593Smuzhiyun            reg = <0>;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun            cvbs_vdac_out: endpoint {
133*4882a593Smuzhiyun                remote-endpoint = <&tv_connector_in>;
134*4882a593Smuzhiyun            };
135*4882a593Smuzhiyun        };
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun        /* HDMI TX output port */
138*4882a593Smuzhiyun        port@1 {
139*4882a593Smuzhiyun            reg = <1>;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun            hdmi_tx_out: endpoint {
142*4882a593Smuzhiyun                remote-endpoint = <&hdmi_tx_in>;
143*4882a593Smuzhiyun            };
144*4882a593Smuzhiyun        };
145*4882a593Smuzhiyun    };
146