xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/ddr/lpddr3.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3".
5*4882a593Smuzhiyun  Example "<vendor>,<type>" values:
6*4882a593Smuzhiyun    "samsung,K3QF2F20DB"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun- density  : <u32> representing density in Mb (Mega bits)
9*4882a593Smuzhiyun- io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
10*4882a593Smuzhiyun- #address-cells: Must be set to 1
11*4882a593Smuzhiyun- #size-cells: Must be set to 0
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunOptional properties:
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunThe following optional properties represent the minimum value of some AC
16*4882a593Smuzhiyuntiming parameters of the DDR device in terms of number of clock cycles.
17*4882a593SmuzhiyunThese values shall be obtained from the device data-sheet.
18*4882a593Smuzhiyun- tRFC-min-tck
19*4882a593Smuzhiyun- tRRD-min-tck
20*4882a593Smuzhiyun- tRPab-min-tck
21*4882a593Smuzhiyun- tRPpb-min-tck
22*4882a593Smuzhiyun- tRCD-min-tck
23*4882a593Smuzhiyun- tRC-min-tck
24*4882a593Smuzhiyun- tRAS-min-tck
25*4882a593Smuzhiyun- tWTR-min-tck
26*4882a593Smuzhiyun- tWR-min-tck
27*4882a593Smuzhiyun- tRTP-min-tck
28*4882a593Smuzhiyun- tW2W-C2C-min-tck
29*4882a593Smuzhiyun- tR2R-C2C-min-tck
30*4882a593Smuzhiyun- tWL-min-tck
31*4882a593Smuzhiyun- tDQSCK-min-tck
32*4882a593Smuzhiyun- tRL-min-tck
33*4882a593Smuzhiyun- tFAW-min-tck
34*4882a593Smuzhiyun- tXSR-min-tck
35*4882a593Smuzhiyun- tXP-min-tck
36*4882a593Smuzhiyun- tCKE-min-tck
37*4882a593Smuzhiyun- tCKESR-min-tck
38*4882a593Smuzhiyun- tMRD-min-tck
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunChild nodes:
41*4882a593Smuzhiyun- The lpddr3 node may have one or more child nodes of type "lpddr3-timings".
42*4882a593Smuzhiyun  "lpddr3-timings" provides AC timing parameters of the device for
43*4882a593Smuzhiyun  a given speed-bin. Please see Documentation/devicetree/
44*4882a593Smuzhiyun  bindings/ddr/lpddr3-timings.txt for more information on "lpddr3-timings"
45*4882a593Smuzhiyun
46*4882a593SmuzhiyunExample:
47*4882a593Smuzhiyun
48*4882a593Smuzhiyunsamsung_K3QF2F20DB: lpddr3 {
49*4882a593Smuzhiyun	compatible	= "samsung,K3QF2F20DB", "jedec,lpddr3";
50*4882a593Smuzhiyun	density		= <16384>;
51*4882a593Smuzhiyun	io-width	= <32>;
52*4882a593Smuzhiyun	#address-cells	= <1>;
53*4882a593Smuzhiyun	#size-cells	= <0>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	tRFC-min-tck		= <17>;
56*4882a593Smuzhiyun	tRRD-min-tck		= <2>;
57*4882a593Smuzhiyun	tRPab-min-tck		= <2>;
58*4882a593Smuzhiyun	tRPpb-min-tck		= <2>;
59*4882a593Smuzhiyun	tRCD-min-tck		= <3>;
60*4882a593Smuzhiyun	tRC-min-tck		= <6>;
61*4882a593Smuzhiyun	tRAS-min-tck		= <5>;
62*4882a593Smuzhiyun	tWTR-min-tck		= <2>;
63*4882a593Smuzhiyun	tWR-min-tck		= <7>;
64*4882a593Smuzhiyun	tRTP-min-tck		= <2>;
65*4882a593Smuzhiyun	tW2W-C2C-min-tck	= <0>;
66*4882a593Smuzhiyun	tR2R-C2C-min-tck	= <0>;
67*4882a593Smuzhiyun	tWL-min-tck		= <8>;
68*4882a593Smuzhiyun	tDQSCK-min-tck		= <5>;
69*4882a593Smuzhiyun	tRL-min-tck		= <14>;
70*4882a593Smuzhiyun	tFAW-min-tck		= <5>;
71*4882a593Smuzhiyun	tXSR-min-tck		= <12>;
72*4882a593Smuzhiyun	tXP-min-tck		= <2>;
73*4882a593Smuzhiyun	tCKE-min-tck		= <2>;
74*4882a593Smuzhiyun	tCKESR-min-tck		= <2>;
75*4882a593Smuzhiyun	tMRD-min-tck		= <5>;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
78*4882a593Smuzhiyun		compatible	= "jedec,lpddr3-timings";
79*4882a593Smuzhiyun		/* workaround: 'reg' shows max-freq */
80*4882a593Smuzhiyun		reg		= <800000000>;
81*4882a593Smuzhiyun		min-freq	= <100000000>;
82*4882a593Smuzhiyun		tRFC		= <65000>;
83*4882a593Smuzhiyun		tRRD		= <6000>;
84*4882a593Smuzhiyun		tRPab		= <12000>;
85*4882a593Smuzhiyun		tRPpb		= <12000>;
86*4882a593Smuzhiyun		tRCD		= <10000>;
87*4882a593Smuzhiyun		tRC		= <33750>;
88*4882a593Smuzhiyun		tRAS		= <23000>;
89*4882a593Smuzhiyun		tWTR		= <3750>;
90*4882a593Smuzhiyun		tWR		= <7500>;
91*4882a593Smuzhiyun		tRTP		= <3750>;
92*4882a593Smuzhiyun		tW2W-C2C	= <0>;
93*4882a593Smuzhiyun		tR2R-C2C	= <0>;
94*4882a593Smuzhiyun		tFAW		= <25000>;
95*4882a593Smuzhiyun		tXSR		= <70000>;
96*4882a593Smuzhiyun		tXP		= <3750>;
97*4882a593Smuzhiyun		tCKE		= <3750>;
98*4882a593Smuzhiyun		tCKESR		= <3750>;
99*4882a593Smuzhiyun		tMRD		= <7000>;
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun}
102