1*4882a593Smuzhiyun* AC timing parameters of LPDDR3 memories for a given speed-bin. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe structures are based on LPDDR2 and extended where needed. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun- compatible : Should be "jedec,lpddr3-timings" 7*4882a593Smuzhiyun- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32> 8*4882a593Smuzhiyun- reg : maximum DDR clock frequency for the speed-bin. Type is <u32> 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunOptional properties: 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe following properties represent AC timing parameters from the memory 13*4882a593Smuzhiyundata-sheet of the device for a given speed-bin. All these properties are 14*4882a593Smuzhiyunof type <u32> and the default unit is ps (pico seconds). 15*4882a593Smuzhiyun- tRFC 16*4882a593Smuzhiyun- tRRD 17*4882a593Smuzhiyun- tRPab 18*4882a593Smuzhiyun- tRPpb 19*4882a593Smuzhiyun- tRCD 20*4882a593Smuzhiyun- tRC 21*4882a593Smuzhiyun- tRAS 22*4882a593Smuzhiyun- tWTR 23*4882a593Smuzhiyun- tWR 24*4882a593Smuzhiyun- tRTP 25*4882a593Smuzhiyun- tW2W-C2C 26*4882a593Smuzhiyun- tR2R-C2C 27*4882a593Smuzhiyun- tFAW 28*4882a593Smuzhiyun- tXSR 29*4882a593Smuzhiyun- tXP 30*4882a593Smuzhiyun- tCKE 31*4882a593Smuzhiyun- tCKESR 32*4882a593Smuzhiyun- tMRD 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunExample: 35*4882a593Smuzhiyun 36*4882a593Smuzhiyuntimings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { 37*4882a593Smuzhiyun compatible = "jedec,lpddr3-timings"; 38*4882a593Smuzhiyun reg = <800000000>; /* workaround: it shows max-freq */ 39*4882a593Smuzhiyun min-freq = <100000000>; 40*4882a593Smuzhiyun tRFC = <65000>; 41*4882a593Smuzhiyun tRRD = <6000>; 42*4882a593Smuzhiyun tRPab = <12000>; 43*4882a593Smuzhiyun tRPpb = <12000>; 44*4882a593Smuzhiyun tRCD = <10000>; 45*4882a593Smuzhiyun tRC = <33750>; 46*4882a593Smuzhiyun tRAS = <23000>; 47*4882a593Smuzhiyun tWTR = <3750>; 48*4882a593Smuzhiyun tWR = <7500>; 49*4882a593Smuzhiyun tRTP = <3750>; 50*4882a593Smuzhiyun tW2W-C2C = <0>; 51*4882a593Smuzhiyun tR2R-C2C = <0>; 52*4882a593Smuzhiyun tFAW = <25000>; 53*4882a593Smuzhiyun tXSR = <70000>; 54*4882a593Smuzhiyun tXP = <3750>; 55*4882a593Smuzhiyun tCKE = <3750>; 56*4882a593Smuzhiyun tCKESR = <3750>; 57*4882a593Smuzhiyun tMRD = <7000>; 58*4882a593Smuzhiyun}; 59