1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: STMicroelectronics STM32 HASH bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Lionel Debieve <lionel.debieve@st.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun enum: 15*4882a593Smuzhiyun - st,stm32f456-hash 16*4882a593Smuzhiyun - st,stm32f756-hash 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun reg: 19*4882a593Smuzhiyun maxItems: 1 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun clocks: 22*4882a593Smuzhiyun maxItems: 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun interrupts: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun resets: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun dmas: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun dma-names: 34*4882a593Smuzhiyun items: 35*4882a593Smuzhiyun - const: in 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun dma-maxburst: 38*4882a593Smuzhiyun description: Set number of maximum dma burst supported 39*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 40*4882a593Smuzhiyun minimum: 0 41*4882a593Smuzhiyun maximum: 2 42*4882a593Smuzhiyun default: 0 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunrequired: 45*4882a593Smuzhiyun - compatible 46*4882a593Smuzhiyun - reg 47*4882a593Smuzhiyun - clocks 48*4882a593Smuzhiyun - interrupts 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunadditionalProperties: false 51*4882a593Smuzhiyun 52*4882a593Smuzhiyunexamples: 53*4882a593Smuzhiyun - | 54*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 55*4882a593Smuzhiyun #include <dt-bindings/clock/stm32mp1-clks.h> 56*4882a593Smuzhiyun #include <dt-bindings/reset/stm32mp1-resets.h> 57*4882a593Smuzhiyun hash@54002000 { 58*4882a593Smuzhiyun compatible = "st,stm32f756-hash"; 59*4882a593Smuzhiyun reg = <0x54002000 0x400>; 60*4882a593Smuzhiyun interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 61*4882a593Smuzhiyun clocks = <&rcc HASH1>; 62*4882a593Smuzhiyun resets = <&rcc HASH1_R>; 63*4882a593Smuzhiyun dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>; 64*4882a593Smuzhiyun dma-names = "in"; 65*4882a593Smuzhiyun dma-maxburst = <2>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun... 69