xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunInside Secure SafeXcel cryptographic engine
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible: Should be "inside-secure,safexcel-eip197b",
5*4882a593Smuzhiyun	      "inside-secure,safexcel-eip197d" or
6*4882a593Smuzhiyun              "inside-secure,safexcel-eip97ies".
7*4882a593Smuzhiyun- reg: Base physical address of the engine and length of memory mapped region.
8*4882a593Smuzhiyun- interrupts: Interrupt numbers for the rings and engine.
9*4882a593Smuzhiyun- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunOptional properties:
12*4882a593Smuzhiyun- clocks: Reference to the crypto engine clocks, the second clock is
13*4882a593Smuzhiyun          needed for the Armada 7K/8K SoCs.
14*4882a593Smuzhiyun- clock-names: mandatory if there is a second clock, in this case the
15*4882a593Smuzhiyun               name must be "core" for the first clock and "reg" for
16*4882a593Smuzhiyun               the second one.
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunBackward compatibility:
19*4882a593SmuzhiyunTwo compatibles are kept for backward compatibility, but shouldn't be used for
20*4882a593Smuzhiyunnew submissions:
21*4882a593Smuzhiyun- "inside-secure,safexcel-eip197" is equivalent to
22*4882a593Smuzhiyun  "inside-secure,safexcel-eip197b".
23*4882a593Smuzhiyun- "inside-secure,safexcel-eip97" is equivalent to
24*4882a593Smuzhiyun  "inside-secure,safexcel-eip97ies".
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunExample:
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	crypto: crypto@800000 {
29*4882a593Smuzhiyun		compatible = "inside-secure,safexcel-eip197b";
30*4882a593Smuzhiyun		reg = <0x800000 0x200000>;
31*4882a593Smuzhiyun		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
32*4882a593Smuzhiyun			     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
33*4882a593Smuzhiyun			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
34*4882a593Smuzhiyun			     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
35*4882a593Smuzhiyun			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
36*4882a593Smuzhiyun			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
37*4882a593Smuzhiyun		interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",
38*4882a593Smuzhiyun				  "eip";
39*4882a593Smuzhiyun		clocks = <&cpm_syscon0 1 26>;
40*4882a593Smuzhiyun	};
41