1*4882a593SmuzhiyunThe Broadcom Secure Processing Unit (SPU) hardware supports symmetric 2*4882a593Smuzhiyuncryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware 3*4882a593Smuzhiyunblocks. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun- compatible: Should be one of the following: 7*4882a593Smuzhiyun brcm,spum-crypto - for devices with SPU-M hardware 8*4882a593Smuzhiyun brcm,spu2-crypto - for devices with SPU2 hardware 9*4882a593Smuzhiyun brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3 10*4882a593Smuzhiyun and Rabin Fingerprint support 11*4882a593Smuzhiyun brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- reg: Should contain SPU registers location and length. 14*4882a593Smuzhiyun- mboxes: The mailbox channel to be used to communicate with the SPU. 15*4882a593Smuzhiyun Mailbox channels correspond to DMA rings on the device. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun crypto@612d0000 { 19*4882a593Smuzhiyun compatible = "brcm,spum-crypto"; 20*4882a593Smuzhiyun reg = <0 0x612d0000 0 0x900>; 21*4882a593Smuzhiyun mboxes = <&pdc0 0>; 22*4882a593Smuzhiyun }; 23