1*4882a593Smuzhiyun* Atmel HW cryptographic accelerators 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThese are the HW cryptographic accelerators found on some Atmel products. 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun* Advanced Encryption Standard (AES) 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible : Should be "atmel,at91sam9g46-aes". 9*4882a593Smuzhiyun- reg: Should contain AES registers location and length. 10*4882a593Smuzhiyun- interrupts: Should contain the IRQ line for the AES. 11*4882a593Smuzhiyun- dmas: List of two DMA specifiers as described in 12*4882a593Smuzhiyun atmel-dma.txt and dma.txt files. 13*4882a593Smuzhiyun- dma-names: Contains one identifier string for each DMA specifier 14*4882a593Smuzhiyun in the dmas property. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyunaes@f8038000 { 18*4882a593Smuzhiyun compatible = "atmel,at91sam9g46-aes"; 19*4882a593Smuzhiyun reg = <0xf8038000 0x100>; 20*4882a593Smuzhiyun interrupts = <43 4 0>; 21*4882a593Smuzhiyun dmas = <&dma1 2 18>, 22*4882a593Smuzhiyun <&dma1 2 19>; 23*4882a593Smuzhiyun dma-names = "tx", "rx"; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun* Triple Data Encryption Standard (Triple DES) 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunRequired properties: 28*4882a593Smuzhiyun- compatible : Should be "atmel,at91sam9g46-tdes". 29*4882a593Smuzhiyun- reg: Should contain TDES registers location and length. 30*4882a593Smuzhiyun- interrupts: Should contain the IRQ line for the TDES. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunOptional properties: 33*4882a593Smuzhiyun- dmas: List of two DMA specifiers as described in 34*4882a593Smuzhiyun atmel-dma.txt and dma.txt files. 35*4882a593Smuzhiyun- dma-names: Contains one identifier string for each DMA specifier 36*4882a593Smuzhiyun in the dmas property. 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunExample: 39*4882a593Smuzhiyuntdes@f803c000 { 40*4882a593Smuzhiyun compatible = "atmel,at91sam9g46-tdes"; 41*4882a593Smuzhiyun reg = <0xf803c000 0x100>; 42*4882a593Smuzhiyun interrupts = <44 4 0>; 43*4882a593Smuzhiyun dmas = <&dma1 2 20>, 44*4882a593Smuzhiyun <&dma1 2 21>; 45*4882a593Smuzhiyun dma-names = "tx", "rx"; 46*4882a593Smuzhiyun}; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun* Secure Hash Algorithm (SHA) 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunRequired properties: 51*4882a593Smuzhiyun- compatible : Should be "atmel,at91sam9g46-sha". 52*4882a593Smuzhiyun- reg: Should contain SHA registers location and length. 53*4882a593Smuzhiyun- interrupts: Should contain the IRQ line for the SHA. 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunOptional properties: 56*4882a593Smuzhiyun- dmas: One DMA specifiers as described in 57*4882a593Smuzhiyun atmel-dma.txt and dma.txt files. 58*4882a593Smuzhiyun- dma-names: Contains one identifier string for each DMA specifier 59*4882a593Smuzhiyun in the dmas property. Only one "tx" string needed. 60*4882a593Smuzhiyun 61*4882a593SmuzhiyunExample: 62*4882a593Smuzhiyunsha@f8034000 { 63*4882a593Smuzhiyun compatible = "atmel,at91sam9g46-sha"; 64*4882a593Smuzhiyun reg = <0xf8034000 0x100>; 65*4882a593Smuzhiyun interrupts = <42 4 0>; 66*4882a593Smuzhiyun dmas = <&dma1 2 17>; 67*4882a593Smuzhiyun dma-names = "tx"; 68*4882a593Smuzhiyun}; 69