1*4882a593SmuzhiyunCommon properties 2*4882a593Smuzhiyun================= 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunEndianness 5*4882a593Smuzhiyun---------- 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThe Devicetree Specification does not define any properties related to hardware 8*4882a593Smuzhiyunbyte swapping, but endianness issues show up frequently in porting drivers to 9*4882a593Smuzhiyundifferent machine types. This document attempts to provide a consistent 10*4882a593Smuzhiyunway of handling byte swapping across drivers. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional properties: 13*4882a593Smuzhiyun - big-endian: Boolean; force big endian register accesses 14*4882a593Smuzhiyun unconditionally (e.g. ioread32be/iowrite32be). Use this if you 15*4882a593Smuzhiyun know the peripheral always needs to be accessed in big endian (BE) mode. 16*4882a593Smuzhiyun - little-endian: Boolean; force little endian register accesses 17*4882a593Smuzhiyun unconditionally (e.g. readl/writel). Use this if you know the 18*4882a593Smuzhiyun peripheral always needs to be accessed in little endian (LE) mode. 19*4882a593Smuzhiyun - native-endian: Boolean; always use register accesses matched to the 20*4882a593Smuzhiyun endianness of the kernel binary (e.g. LE vmlinux -> readl/writel, 21*4882a593Smuzhiyun BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps 22*4882a593Smuzhiyun will ever be performed. Use this if the hardware "self-adjusts" 23*4882a593Smuzhiyun register endianness based on the CPU's configured endianness. 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunIf a binding supports these properties, then the binding should also 26*4882a593Smuzhiyunspecify the default behavior if none of these properties are present. 27*4882a593SmuzhiyunIn such cases, little-endian is the preferred default, but it is not 28*4882a593Smuzhiyuna requirement. Some implementations assume that little-endian is 29*4882a593Smuzhiyunthe default, because most existing (PCI-based) drivers implicitly 30*4882a593Smuzhiyundefault to LE for their MMIO accesses. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunExamples: 33*4882a593SmuzhiyunScenario 1 : CPU in LE mode & device in LE mode. 34*4882a593Smuzhiyundev: dev@40031000 { 35*4882a593Smuzhiyun compatible = "name"; 36*4882a593Smuzhiyun reg = <0x40031000 0x1000>; 37*4882a593Smuzhiyun ... 38*4882a593Smuzhiyun native-endian; 39*4882a593Smuzhiyun}; 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunScenario 2 : CPU in LE mode & device in BE mode. 42*4882a593Smuzhiyundev: dev@40031000 { 43*4882a593Smuzhiyun compatible = "name"; 44*4882a593Smuzhiyun reg = <0x40031000 0x1000>; 45*4882a593Smuzhiyun ... 46*4882a593Smuzhiyun big-endian; 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593SmuzhiyunScenario 3 : CPU in BE mode & device in BE mode. 50*4882a593Smuzhiyundev: dev@40031000 { 51*4882a593Smuzhiyun compatible = "name"; 52*4882a593Smuzhiyun reg = <0x40031000 0x1000>; 53*4882a593Smuzhiyun ... 54*4882a593Smuzhiyun native-endian; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593SmuzhiyunScenario 4 : CPU in BE mode & device in LE mode. 58*4882a593Smuzhiyundev: dev@40031000 { 59*4882a593Smuzhiyun compatible = "name"; 60*4882a593Smuzhiyun reg = <0x40031000 0x1000>; 61*4882a593Smuzhiyun ... 62*4882a593Smuzhiyun little-endian; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunDaisy-chained devices 66*4882a593Smuzhiyun--------------------- 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunMany serially-attached GPIO and IIO devices are daisy-chainable. To the 69*4882a593Smuzhiyunhost controller, a daisy-chain appears as a single device, but the number 70*4882a593Smuzhiyunof inputs and outputs it provides is the sum of inputs and outputs provided 71*4882a593Smuzhiyunby all of its devices. The driver needs to know how many devices the 72*4882a593Smuzhiyundaisy-chain comprises to determine the amount of data exchanged, how many 73*4882a593Smuzhiyuninputs and outputs to register and so on. 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunOptional properties: 76*4882a593Smuzhiyun - #daisy-chained-devices: Number of devices in the daisy-chain (default is 1). 77*4882a593Smuzhiyun 78*4882a593SmuzhiyunExample: 79*4882a593Smuzhiyungpio@0 { 80*4882a593Smuzhiyun compatible = "name"; 81*4882a593Smuzhiyun reg = <0>; 82*4882a593Smuzhiyun gpio-controller; 83*4882a593Smuzhiyun #gpio-cells = <2>; 84*4882a593Smuzhiyun #daisy-chained-devices = <3>; 85*4882a593Smuzhiyun}; 86