1*4882a593SmuzhiyunBinding for Texas Instruments interface clock. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunBinding status: Unstable - ABI compatibility may be broken in the future 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThis binding uses the common clock binding[1]. This clock is 6*4882a593Smuzhiyunquite much similar to the basic gate-clock [2], however, 7*4882a593Smuzhiyunit supports a number of additional features, including 8*4882a593Smuzhiyuncompanion clock finding (match corresponding functional gate 9*4882a593Smuzhiyunclock) and hardware autoidle enable / disable. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 12*4882a593Smuzhiyun[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunRequired properties: 15*4882a593Smuzhiyun- compatible : shall be one of: 16*4882a593Smuzhiyun "ti,omap3-interface-clock" - basic OMAP3 interface clock 17*4882a593Smuzhiyun "ti,omap3-no-wait-interface-clock" - interface clock which has no hardware 18*4882a593Smuzhiyun capability for waiting clock to be ready 19*4882a593Smuzhiyun "ti,omap3-hsotgusb-interface-clock" - interface clock with USB specific HW 20*4882a593Smuzhiyun handling 21*4882a593Smuzhiyun "ti,omap3-dss-interface-clock" - interface clock with DSS specific HW handling 22*4882a593Smuzhiyun "ti,omap3-ssi-interface-clock" - interface clock with SSI specific HW handling 23*4882a593Smuzhiyun "ti,am35xx-interface-clock" - interface clock with AM35xx specific HW handling 24*4882a593Smuzhiyun "ti,omap2430-interface-clock" - interface clock with OMAP2430 specific HW 25*4882a593Smuzhiyun handling 26*4882a593Smuzhiyun- #clock-cells : from common clock binding; shall be set to 0 27*4882a593Smuzhiyun- clocks : link to phandle of parent clock 28*4882a593Smuzhiyun- reg : base address for the control register 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunOptional properties: 31*4882a593Smuzhiyun- ti,bit-shift : bit shift for the bit enabling/disabling the clock (default 0) 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunExamples: 34*4882a593Smuzhiyun aes1_ick: aes1_ick@48004a14 { 35*4882a593Smuzhiyun #clock-cells = <0>; 36*4882a593Smuzhiyun compatible = "ti,omap3-interface-clock"; 37*4882a593Smuzhiyun clocks = <&security_l4_ick2>; 38*4882a593Smuzhiyun reg = <0x48004a14 0x4>; 39*4882a593Smuzhiyun ti,bit-shift = <3>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun cam_ick: cam_ick@48004f10 { 43*4882a593Smuzhiyun #clock-cells = <0>; 44*4882a593Smuzhiyun compatible = "ti,omap3-no-wait-interface-clock"; 45*4882a593Smuzhiyun clocks = <&l4_ick>; 46*4882a593Smuzhiyun reg = <0x48004f10 0x4>; 47*4882a593Smuzhiyun ti,bit-shift = <0>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun ssi_ick_3430es2: ssi_ick_3430es2@48004a10 { 51*4882a593Smuzhiyun #clock-cells = <0>; 52*4882a593Smuzhiyun compatible = "ti,omap3-ssi-interface-clock"; 53*4882a593Smuzhiyun clocks = <&ssi_l4_ick>; 54*4882a593Smuzhiyun reg = <0x48004a10 0x4>; 55*4882a593Smuzhiyun ti,bit-shift = <0>; 56*4882a593Smuzhiyun }; 57