1*4882a593SmuzhiyunTexas Instruments clkctrl clock binding 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunTexas Instruments SoCs can have a clkctrl clock controller for each 4*4882a593Smuzhiyuninterconnect target module. The clkctrl clock controller manages functional 5*4882a593Smuzhiyunand interface clocks for each module. Each clkctrl controller can also 6*4882a593Smuzhiyungate one or more optional functional clocks for a module, and can have one 7*4882a593Smuzhiyunor more clock muxes. There is a clkctrl clock controller typically for each 8*4882a593Smuzhiyuninterconnect target module on omap4 and later variants. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunThe clock consumers can specify the index of the clkctrl clock using 11*4882a593Smuzhiyunthe hardware offset from the clkctrl instance register space. The optional 12*4882a593Smuzhiyunclocks can be specified by clkctrl hardware offset and the index of the 13*4882a593Smuzhiyunoptional clock. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunFor more information, please see the Linux clock framework binding at 16*4882a593SmuzhiyunDocumentation/devicetree/bindings/clock/clock-bindings.txt. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunRequired properties : 19*4882a593Smuzhiyun- compatible : shall be "ti,clkctrl" or a clock domain specific name: 20*4882a593Smuzhiyun "ti,clkctrl-l4-cfg" 21*4882a593Smuzhiyun "ti,clkctrl-l4-per" 22*4882a593Smuzhiyun "ti,clkctrl-l4-secure" 23*4882a593Smuzhiyun "ti,clkctrl-l4-wkup" 24*4882a593Smuzhiyun- #clock-cells : shall contain 2 with the first entry being the instance 25*4882a593Smuzhiyun offset from the clock domain base and the second being the 26*4882a593Smuzhiyun clock index 27*4882a593Smuzhiyun- reg : clock registers 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunExample: Clock controller node on omap 4430: 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun&cm2 { 32*4882a593Smuzhiyun l4per: cm@1400 { 33*4882a593Smuzhiyun cm_l4per@0 { 34*4882a593Smuzhiyun cm_l4per_clkctrl: clock@20 { 35*4882a593Smuzhiyun compatible = "ti,clkctrl-l4-per", "ti,clkctrl"; 36*4882a593Smuzhiyun reg = <0x20 0x1b0>; 37*4882a593Smuzhiyun #clock-cells = <2>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunExample: Preprocessor helper macros in dt-bindings/clock/ti-clkctrl.h 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#define OMAP4_CLKCTRL_OFFSET 0x20 46*4882a593Smuzhiyun#define OMAP4_CLKCTRL_INDEX(offset) ((offset) - OMAP4_CLKCTRL_OFFSET) 47*4882a593Smuzhiyun#define MODULEMODE_HWCTRL 1 48*4882a593Smuzhiyun#define MODULEMODE_SWCTRL 2 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun#define OMAP4_GPTIMER10_CLKTRL OMAP4_CLKCTRL_INDEX(0x28) 51*4882a593Smuzhiyun#define OMAP4_GPTIMER11_CLKTRL OMAP4_CLKCTRL_INDEX(0x30) 52*4882a593Smuzhiyun#define OMAP4_GPTIMER2_CLKTRL OMAP4_CLKCTRL_INDEX(0x38) 53*4882a593Smuzhiyun... 54*4882a593Smuzhiyun#define OMAP4_GPIO2_CLKCTRL OMAP_CLKCTRL_INDEX(0x60) 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunExample: Clock consumer node for GPIO2: 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&gpio2 { 59*4882a593Smuzhiyun clocks = <&cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 0 60*4882a593Smuzhiyun &cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 8>; 61*4882a593Smuzhiyun}; 62