1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright 2019 Unisoc Inc. 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#" 6*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: SC9863A Clock Control Unit Device Tree Bindings 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Orson Zhai <orsonzhai@gmail.com> 12*4882a593Smuzhiyun - Baolin Wang <baolin.wang7@gmail.com> 13*4882a593Smuzhiyun - Chunyan Zhang <zhang.lyra@gmail.com> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun "#clock-cells": 17*4882a593Smuzhiyun const: 1 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun enum: 21*4882a593Smuzhiyun - sprd,sc9863a-ap-clk 22*4882a593Smuzhiyun - sprd,sc9863a-aon-clk 23*4882a593Smuzhiyun - sprd,sc9863a-apahb-gate 24*4882a593Smuzhiyun - sprd,sc9863a-pmu-gate 25*4882a593Smuzhiyun - sprd,sc9863a-aonapb-gate 26*4882a593Smuzhiyun - sprd,sc9863a-pll 27*4882a593Smuzhiyun - sprd,sc9863a-mpll 28*4882a593Smuzhiyun - sprd,sc9863a-rpll 29*4882a593Smuzhiyun - sprd,sc9863a-dpll 30*4882a593Smuzhiyun - sprd,sc9863a-mm-gate 31*4882a593Smuzhiyun - sprd,sc9863a-mm-clk 32*4882a593Smuzhiyun - sprd,sc9863a-apapb-gate 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun clocks: 35*4882a593Smuzhiyun minItems: 1 36*4882a593Smuzhiyun maxItems: 4 37*4882a593Smuzhiyun description: | 38*4882a593Smuzhiyun The input parent clock(s) phandle for this clock, only list fixed 39*4882a593Smuzhiyun clocks which are declared in devicetree. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun clock-names: 42*4882a593Smuzhiyun minItems: 1 43*4882a593Smuzhiyun maxItems: 4 44*4882a593Smuzhiyun items: 45*4882a593Smuzhiyun - const: ext-26m 46*4882a593Smuzhiyun - const: ext-32k 47*4882a593Smuzhiyun - const: ext-4m 48*4882a593Smuzhiyun - const: rco-100m 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun reg: 51*4882a593Smuzhiyun maxItems: 1 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunrequired: 54*4882a593Smuzhiyun - compatible 55*4882a593Smuzhiyun - '#clock-cells' 56*4882a593Smuzhiyun 57*4882a593Smuzhiyunif: 58*4882a593Smuzhiyun properties: 59*4882a593Smuzhiyun compatible: 60*4882a593Smuzhiyun enum: 61*4882a593Smuzhiyun - sprd,sc9863a-ap-clk 62*4882a593Smuzhiyun - sprd,sc9863a-aon-clk 63*4882a593Smuzhiyunthen: 64*4882a593Smuzhiyun required: 65*4882a593Smuzhiyun - reg 66*4882a593Smuzhiyun 67*4882a593Smuzhiyunelse: 68*4882a593Smuzhiyun description: | 69*4882a593Smuzhiyun Other SC9863a clock nodes should be the child of a syscon node in 70*4882a593Smuzhiyun which compatible string shoule be: 71*4882a593Smuzhiyun "sprd,sc9863a-glbregs", "syscon", "simple-mfd" 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun The 'reg' property for the clock node is also required if there is a sub 74*4882a593Smuzhiyun range of registers for the clocks. 75*4882a593Smuzhiyun 76*4882a593SmuzhiyunadditionalProperties: false 77*4882a593Smuzhiyun 78*4882a593Smuzhiyunexamples: 79*4882a593Smuzhiyun - | 80*4882a593Smuzhiyun ap_clk: clock-controller@21500000 { 81*4882a593Smuzhiyun compatible = "sprd,sc9863a-ap-clk"; 82*4882a593Smuzhiyun reg = <0x21500000 0x1000>; 83*4882a593Smuzhiyun clocks = <&ext_26m>, <&ext_32k>; 84*4882a593Smuzhiyun clock-names = "ext-26m", "ext-32k"; 85*4882a593Smuzhiyun #clock-cells = <1>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun - | 89*4882a593Smuzhiyun syscon@20e00000 { 90*4882a593Smuzhiyun compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd"; 91*4882a593Smuzhiyun reg = <0x20e00000 0x4000>; 92*4882a593Smuzhiyun #address-cells = <1>; 93*4882a593Smuzhiyun #size-cells = <1>; 94*4882a593Smuzhiyun ranges = <0 0x20e00000 0x4000>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun apahb_gate: apahb-gate@0 { 97*4882a593Smuzhiyun compatible = "sprd,sc9863a-apahb-gate"; 98*4882a593Smuzhiyun reg = <0x0 0x1020>; 99*4882a593Smuzhiyun #clock-cells = <1>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun... 104