xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593SmuzhiyunBinding for the HSDK Generic PLL clock
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3*4882a593SmuzhiyunThis binding uses the common clock binding[1].
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5*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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7*4882a593SmuzhiyunRequired properties:
8*4882a593Smuzhiyun- compatible: should be "snps,hsdk-<name>-pll-clock"
9*4882a593Smuzhiyun  "snps,hsdk-core-pll-clock"
10*4882a593Smuzhiyun  "snps,hsdk-gp-pll-clock"
11*4882a593Smuzhiyun  "snps,hsdk-hdmi-pll-clock"
12*4882a593Smuzhiyun- reg : should contain base register location and length.
13*4882a593Smuzhiyun- clocks: shall be the input parent clock phandle for the PLL.
14*4882a593Smuzhiyun- #clock-cells: from common clock binding; Should always be set to 0.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunExample:
17*4882a593Smuzhiyun	input_clk: input-clk {
18*4882a593Smuzhiyun		clock-frequency = <33333333>;
19*4882a593Smuzhiyun		compatible = "fixed-clock";
20*4882a593Smuzhiyun		#clock-cells = <0>;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	cpu_clk: cpu-clk@0 {
24*4882a593Smuzhiyun		compatible = "snps,hsdk-core-pll-clock";
25*4882a593Smuzhiyun		reg = <0x00 0x10>;
26*4882a593Smuzhiyun		#clock-cells = <0>;
27*4882a593Smuzhiyun		clocks = <&input_clk>;
28*4882a593Smuzhiyun	};
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