1*4882a593SmuzhiyunRenesas H8S2678 PLL clock 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis device is Clock multiplyer 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired Properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun - compatible: Must be "renesas,h8s2678-pll-clock" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun - clocks: Reference to the parent clocks 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun - #clock-cells: Must be 0 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun - reg: Two rate selector (Multiply / Divide) register address 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunExample 16*4882a593Smuzhiyun------- 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun pllclk: pllclk { 19*4882a593Smuzhiyun compatible = "renesas,h8s2678-pll-clock"; 20*4882a593Smuzhiyun clocks = <&xclk>; 21*4882a593Smuzhiyun #clock-cells = <0>; 22*4882a593Smuzhiyun reg = <0xfee03b 2>, <0xfee045 2>; 23*4882a593Smuzhiyun }; 24