1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/renesas,cpg-clocks.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas Clock Pulse Generator (CPG) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun The Clock Pulse Generator (CPG) generates core clocks for the SoC. It 14*4882a593Smuzhiyun includes PLLs, and fixed and variable ratio dividers. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun The CPG may also provide a Clock Domain for SoC devices, in combination with 17*4882a593Smuzhiyun the CPG Module Stop (MSTP) Clocks. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunproperties: 20*4882a593Smuzhiyun compatible: 21*4882a593Smuzhiyun oneOf: 22*4882a593Smuzhiyun - const: renesas,r8a73a4-cpg-clocks # R-Mobile APE6 23*4882a593Smuzhiyun - const: renesas,r8a7740-cpg-clocks # R-Mobile A1 24*4882a593Smuzhiyun - const: renesas,r8a7778-cpg-clocks # R-Car M1 25*4882a593Smuzhiyun - const: renesas,r8a7779-cpg-clocks # R-Car H1 26*4882a593Smuzhiyun - items: 27*4882a593Smuzhiyun - enum: 28*4882a593Smuzhiyun - renesas,r7s72100-cpg-clocks # RZ/A1H 29*4882a593Smuzhiyun - const: renesas,rz-cpg-clocks # RZ/A1 30*4882a593Smuzhiyun - const: renesas,sh73a0-cpg-clocks # SH-Mobile AG5 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun reg: 33*4882a593Smuzhiyun maxItems: 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun clocks: true 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun '#clock-cells': 38*4882a593Smuzhiyun const: 1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun clock-output-names: true 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun renesas,mode: 43*4882a593Smuzhiyun description: Board-specific settings of the MD_CK* bits on R-Mobile A1 44*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 45*4882a593Smuzhiyun minimum: 0 46*4882a593Smuzhiyun maximum: 7 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun '#power-domain-cells': 49*4882a593Smuzhiyun const: 0 50*4882a593Smuzhiyun 51*4882a593Smuzhiyunrequired: 52*4882a593Smuzhiyun - compatible 53*4882a593Smuzhiyun - reg 54*4882a593Smuzhiyun - clocks 55*4882a593Smuzhiyun - '#clock-cells' 56*4882a593Smuzhiyun - clock-output-names 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunallOf: 59*4882a593Smuzhiyun - if: 60*4882a593Smuzhiyun properties: 61*4882a593Smuzhiyun compatible: 62*4882a593Smuzhiyun contains: 63*4882a593Smuzhiyun const: renesas,r8a73a4-cpg-clocks 64*4882a593Smuzhiyun then: 65*4882a593Smuzhiyun properties: 66*4882a593Smuzhiyun clocks: 67*4882a593Smuzhiyun items: 68*4882a593Smuzhiyun - description: extal1 69*4882a593Smuzhiyun - description: extal2 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun clock-output-names: 72*4882a593Smuzhiyun items: 73*4882a593Smuzhiyun - const: main 74*4882a593Smuzhiyun - const: pll0 75*4882a593Smuzhiyun - const: pll1 76*4882a593Smuzhiyun - const: pll2 77*4882a593Smuzhiyun - const: pll2s 78*4882a593Smuzhiyun - const: pll2h 79*4882a593Smuzhiyun - const: z 80*4882a593Smuzhiyun - const: z2 81*4882a593Smuzhiyun - const: i 82*4882a593Smuzhiyun - const: m3 83*4882a593Smuzhiyun - const: b 84*4882a593Smuzhiyun - const: m1 85*4882a593Smuzhiyun - const: m2 86*4882a593Smuzhiyun - const: zx 87*4882a593Smuzhiyun - const: zs 88*4882a593Smuzhiyun - const: hp 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun - if: 91*4882a593Smuzhiyun properties: 92*4882a593Smuzhiyun compatible: 93*4882a593Smuzhiyun contains: 94*4882a593Smuzhiyun const: renesas,r8a7740-cpg-clocks 95*4882a593Smuzhiyun then: 96*4882a593Smuzhiyun properties: 97*4882a593Smuzhiyun clocks: 98*4882a593Smuzhiyun items: 99*4882a593Smuzhiyun - description: extal1 100*4882a593Smuzhiyun - description: extal2 101*4882a593Smuzhiyun - description: extalr 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun clock-output-names: 104*4882a593Smuzhiyun items: 105*4882a593Smuzhiyun - const: system 106*4882a593Smuzhiyun - const: pllc0 107*4882a593Smuzhiyun - const: pllc1 108*4882a593Smuzhiyun - const: pllc2 109*4882a593Smuzhiyun - const: r 110*4882a593Smuzhiyun - const: usb24s 111*4882a593Smuzhiyun - const: i 112*4882a593Smuzhiyun - const: zg 113*4882a593Smuzhiyun - const: b 114*4882a593Smuzhiyun - const: m1 115*4882a593Smuzhiyun - const: hp 116*4882a593Smuzhiyun - const: hpp 117*4882a593Smuzhiyun - const: usbp 118*4882a593Smuzhiyun - const: s 119*4882a593Smuzhiyun - const: zb 120*4882a593Smuzhiyun - const: m3 121*4882a593Smuzhiyun - const: cp 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun required: 124*4882a593Smuzhiyun - renesas,mode 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun - if: 127*4882a593Smuzhiyun properties: 128*4882a593Smuzhiyun compatible: 129*4882a593Smuzhiyun contains: 130*4882a593Smuzhiyun const: renesas,r8a7778-cpg-clocks 131*4882a593Smuzhiyun then: 132*4882a593Smuzhiyun properties: 133*4882a593Smuzhiyun clocks: 134*4882a593Smuzhiyun maxItems: 1 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun clock-output-names: 137*4882a593Smuzhiyun items: 138*4882a593Smuzhiyun - const: plla 139*4882a593Smuzhiyun - const: pllb 140*4882a593Smuzhiyun - const: b 141*4882a593Smuzhiyun - const: out 142*4882a593Smuzhiyun - const: p 143*4882a593Smuzhiyun - const: s 144*4882a593Smuzhiyun - const: s1 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun - if: 147*4882a593Smuzhiyun properties: 148*4882a593Smuzhiyun compatible: 149*4882a593Smuzhiyun contains: 150*4882a593Smuzhiyun const: renesas,r8a7779-cpg-clocks 151*4882a593Smuzhiyun then: 152*4882a593Smuzhiyun properties: 153*4882a593Smuzhiyun clocks: 154*4882a593Smuzhiyun maxItems: 1 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun clock-output-names: 157*4882a593Smuzhiyun items: 158*4882a593Smuzhiyun - const: plla 159*4882a593Smuzhiyun - const: z 160*4882a593Smuzhiyun - const: zs 161*4882a593Smuzhiyun - const: s 162*4882a593Smuzhiyun - const: s1 163*4882a593Smuzhiyun - const: p 164*4882a593Smuzhiyun - const: b 165*4882a593Smuzhiyun - const: out 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun - if: 168*4882a593Smuzhiyun properties: 169*4882a593Smuzhiyun compatible: 170*4882a593Smuzhiyun contains: 171*4882a593Smuzhiyun const: renesas,r7s72100-cpg-clocks 172*4882a593Smuzhiyun then: 173*4882a593Smuzhiyun properties: 174*4882a593Smuzhiyun clocks: 175*4882a593Smuzhiyun items: 176*4882a593Smuzhiyun - description: extal1 177*4882a593Smuzhiyun - description: usb_x1 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun clock-output-names: 180*4882a593Smuzhiyun items: 181*4882a593Smuzhiyun - const: pll 182*4882a593Smuzhiyun - const: i 183*4882a593Smuzhiyun - const: g 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun - if: 186*4882a593Smuzhiyun properties: 187*4882a593Smuzhiyun compatible: 188*4882a593Smuzhiyun contains: 189*4882a593Smuzhiyun const: renesas,sh73a0-cpg-clocks 190*4882a593Smuzhiyun then: 191*4882a593Smuzhiyun properties: 192*4882a593Smuzhiyun clocks: 193*4882a593Smuzhiyun items: 194*4882a593Smuzhiyun - description: extal1 195*4882a593Smuzhiyun - description: extal2 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun clock-output-names: 198*4882a593Smuzhiyun items: 199*4882a593Smuzhiyun - const: main 200*4882a593Smuzhiyun - const: pll0 201*4882a593Smuzhiyun - const: pll1 202*4882a593Smuzhiyun - const: pll2 203*4882a593Smuzhiyun - const: pll3 204*4882a593Smuzhiyun - const: dsi0phy 205*4882a593Smuzhiyun - const: dsi1phy 206*4882a593Smuzhiyun - const: zg 207*4882a593Smuzhiyun - const: m3 208*4882a593Smuzhiyun - const: b 209*4882a593Smuzhiyun - const: m1 210*4882a593Smuzhiyun - const: m2 211*4882a593Smuzhiyun - const: z 212*4882a593Smuzhiyun - const: zx 213*4882a593Smuzhiyun - const: hp 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun - if: 216*4882a593Smuzhiyun properties: 217*4882a593Smuzhiyun compatible: 218*4882a593Smuzhiyun contains: 219*4882a593Smuzhiyun enum: 220*4882a593Smuzhiyun - renesas,r8a7778-cpg-clocks 221*4882a593Smuzhiyun - renesas,r8a7779-cpg-clocks 222*4882a593Smuzhiyun - renesas,rz-cpg-clocks 223*4882a593Smuzhiyun then: 224*4882a593Smuzhiyun required: 225*4882a593Smuzhiyun - '#power-domain-cells' 226*4882a593Smuzhiyun 227*4882a593SmuzhiyunadditionalProperties: false 228*4882a593Smuzhiyun 229*4882a593Smuzhiyunexamples: 230*4882a593Smuzhiyun - | 231*4882a593Smuzhiyun #include <dt-bindings/clock/r8a7740-clock.h> 232*4882a593Smuzhiyun cpg_clocks: cpg_clocks@e6150000 { 233*4882a593Smuzhiyun compatible = "renesas,r8a7740-cpg-clocks"; 234*4882a593Smuzhiyun reg = <0xe6150000 0x10000>; 235*4882a593Smuzhiyun clocks = <&extal1_clk>, <&extal2_clk>, <&extalr_clk>; 236*4882a593Smuzhiyun #clock-cells = <1>; 237*4882a593Smuzhiyun clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r", 238*4882a593Smuzhiyun "usb24s", "i", "zg", "b", "m1", "hp", "hpp", 239*4882a593Smuzhiyun "usbp", "s", "zb", "m3", "cp"; 240*4882a593Smuzhiyun renesas,mode = <0x05>; 241*4882a593Smuzhiyun }; 242