1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/qcom,q6sstopcc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Q6SSTOP clock Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Govind Singh <govinds@codeaurora.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun const: "qcom,qcs404-q6sstopcc" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun reg: 17*4882a593Smuzhiyun items: 18*4882a593Smuzhiyun - description: Q6SSTOP clocks register region 19*4882a593Smuzhiyun - description: Q6SSTOP_TCSR register region 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun clocks: 22*4882a593Smuzhiyun items: 23*4882a593Smuzhiyun - description: ahb clock for the q6sstopCC 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun '#clock-cells': 26*4882a593Smuzhiyun const: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyunrequired: 29*4882a593Smuzhiyun - compatible 30*4882a593Smuzhiyun - reg 31*4882a593Smuzhiyun - clocks 32*4882a593Smuzhiyun - '#clock-cells' 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunadditionalProperties: false 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunexamples: 37*4882a593Smuzhiyun - | 38*4882a593Smuzhiyun q6sstopcc: clock-controller@7500000 { 39*4882a593Smuzhiyun compatible = "qcom,qcs404-q6sstopcc"; 40*4882a593Smuzhiyun reg = <0x07500000 0x4e000>, <0x07550000 0x10000>; 41*4882a593Smuzhiyun clocks = <&gcc 141>; 42*4882a593Smuzhiyun #clock-cells = <1>; 43*4882a593Smuzhiyun }; 44