1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm Global Clock & Reset Controller Binding for APQ8064 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Stephen Boyd <sboyd@kernel.org> 11*4882a593Smuzhiyun - Taniya Das <tdas@codeaurora.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun Qualcomm global clock control module which supports the clocks, resets and 15*4882a593Smuzhiyun power domains on APQ8064. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun See also: 18*4882a593Smuzhiyun - dt-bindings/clock/qcom,gcc-msm8960.h 19*4882a593Smuzhiyun - dt-bindings/reset/qcom,gcc-msm8960.h 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunproperties: 22*4882a593Smuzhiyun compatible: 23*4882a593Smuzhiyun const: qcom,gcc-apq8064 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun '#clock-cells': 26*4882a593Smuzhiyun const: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun '#reset-cells': 29*4882a593Smuzhiyun const: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun '#power-domain-cells': 32*4882a593Smuzhiyun const: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun reg: 35*4882a593Smuzhiyun maxItems: 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun nvmem-cells: 38*4882a593Smuzhiyun minItems: 1 39*4882a593Smuzhiyun maxItems: 2 40*4882a593Smuzhiyun description: 41*4882a593Smuzhiyun Qualcomm TSENS (thermal sensor device) on some devices can 42*4882a593Smuzhiyun be part of GCC and hence the TSENS properties can also be part 43*4882a593Smuzhiyun of the GCC/clock-controller node. 44*4882a593Smuzhiyun For more details on the TSENS properties please refer 45*4882a593Smuzhiyun Documentation/devicetree/bindings/thermal/qcom-tsens.yaml 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun nvmem-cell-names: 48*4882a593Smuzhiyun minItems: 1 49*4882a593Smuzhiyun maxItems: 2 50*4882a593Smuzhiyun items: 51*4882a593Smuzhiyun - const: calib 52*4882a593Smuzhiyun - const: calib_backup 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun '#thermal-sensor-cells': 55*4882a593Smuzhiyun const: 1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun protected-clocks: 58*4882a593Smuzhiyun description: 59*4882a593Smuzhiyun Protected clock specifier list as per common clock binding. 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunrequired: 62*4882a593Smuzhiyun - compatible 63*4882a593Smuzhiyun - reg 64*4882a593Smuzhiyun - '#clock-cells' 65*4882a593Smuzhiyun - '#reset-cells' 66*4882a593Smuzhiyun - '#power-domain-cells' 67*4882a593Smuzhiyun - nvmem-cells 68*4882a593Smuzhiyun - nvmem-cell-names 69*4882a593Smuzhiyun - '#thermal-sensor-cells' 70*4882a593Smuzhiyun 71*4882a593SmuzhiyunadditionalProperties: false 72*4882a593Smuzhiyun 73*4882a593Smuzhiyunexamples: 74*4882a593Smuzhiyun - | 75*4882a593Smuzhiyun clock-controller@900000 { 76*4882a593Smuzhiyun compatible = "qcom,gcc-apq8064"; 77*4882a593Smuzhiyun reg = <0x00900000 0x4000>; 78*4882a593Smuzhiyun nvmem-cells = <&tsens_calib>, <&tsens_backup>; 79*4882a593Smuzhiyun nvmem-cell-names = "calib", "calib_backup"; 80*4882a593Smuzhiyun #clock-cells = <1>; 81*4882a593Smuzhiyun #reset-cells = <1>; 82*4882a593Smuzhiyun #power-domain-cells = <1>; 83*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun... 86