1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm A53 PLL Binding 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Sivaprakash Murugesan <sivaprak@codeaurora.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for 14*4882a593Smuzhiyun frequencies above 1GHz. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun enum: 19*4882a593Smuzhiyun - qcom,ipq6018-a53pll 20*4882a593Smuzhiyun - qcom,msm8916-a53pll 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun reg: 23*4882a593Smuzhiyun maxItems: 1 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun '#clock-cells': 26*4882a593Smuzhiyun const: 0 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun clocks: 29*4882a593Smuzhiyun items: 30*4882a593Smuzhiyun - description: board XO clock 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clock-names: 33*4882a593Smuzhiyun items: 34*4882a593Smuzhiyun - const: xo 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunrequired: 37*4882a593Smuzhiyun - compatible 38*4882a593Smuzhiyun - reg 39*4882a593Smuzhiyun - '#clock-cells' 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunadditionalProperties: false 42*4882a593Smuzhiyun 43*4882a593Smuzhiyunexamples: 44*4882a593Smuzhiyun #Example 1 - A53 PLL found on MSM8916 devices 45*4882a593Smuzhiyun - | 46*4882a593Smuzhiyun a53pll: clock@b016000 { 47*4882a593Smuzhiyun compatible = "qcom,msm8916-a53pll"; 48*4882a593Smuzhiyun reg = <0xb016000 0x40>; 49*4882a593Smuzhiyun #clock-cells = <0>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun #Example 2 - A53 PLL found on IPQ6018 devices 52*4882a593Smuzhiyun - | 53*4882a593Smuzhiyun a53pll_ipq: clock-controller@b116000 { 54*4882a593Smuzhiyun compatible = "qcom,ipq6018-a53pll"; 55*4882a593Smuzhiyun reg = <0x0b116000 0x40>; 56*4882a593Smuzhiyun #clock-cells = <0>; 57*4882a593Smuzhiyun clocks = <&xo>; 58*4882a593Smuzhiyun clock-names = "xo"; 59*4882a593Smuzhiyun }; 60