1*4882a593SmuzhiyunNXP LPC32xx Clock Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be "nxp,lpc3220-clk" 5*4882a593Smuzhiyun- reg: should contain clock controller registers location and length 6*4882a593Smuzhiyun- #clock-cells: must be 1, the cell holds id of a clock provided by the 7*4882a593Smuzhiyun clock controller 8*4882a593Smuzhiyun- clocks: phandles of external oscillators, the list must contain one 9*4882a593Smuzhiyun 32768 Hz oscillator and may have one optional high frequency oscillator 10*4882a593Smuzhiyun- clock-names: list of external oscillator clock names, must contain 11*4882a593Smuzhiyun "xtal_32k" and may have optional "xtal" 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExamples: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* System Control Block */ 16*4882a593Smuzhiyun scb { 17*4882a593Smuzhiyun compatible = "simple-bus"; 18*4882a593Smuzhiyun ranges = <0x0 0x040004000 0x00001000>; 19*4882a593Smuzhiyun #address-cells = <1>; 20*4882a593Smuzhiyun #size-cells = <1>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun clk: clock-controller@0 { 23*4882a593Smuzhiyun compatible = "nxp,lpc3220-clk"; 24*4882a593Smuzhiyun reg = <0x00 0x114>; 25*4882a593Smuzhiyun #clock-cells = <1>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks = <&xtal_32k>, <&xtal>; 28*4882a593Smuzhiyun clock-names = "xtal_32k", "xtal"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun }; 31