1*4882a593SmuzhiyunTI-NSPIRE Clocks 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Valid compatible properties include: 5*4882a593Smuzhiyun "lsi,nspire-cx-ahb-divider" for the AHB divider in the CX model 6*4882a593Smuzhiyun "lsi,nspire-classic-ahb-divider" for the AHB divider in the older model 7*4882a593Smuzhiyun "lsi,nspire-cx-clock" for the base clock in the CX model 8*4882a593Smuzhiyun "lsi,nspire-classic-clock" for the base clock in the older model 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- reg: Physical base address of the controller and length of memory mapped 11*4882a593Smuzhiyun region. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional: 14*4882a593Smuzhiyun- clocks: For the "nspire-*-ahb-divider" compatible clocks, this is the parent 15*4882a593Smuzhiyun clock where it divides the rate from. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunahb_clk { 20*4882a593Smuzhiyun #clock-cells = <0>; 21*4882a593Smuzhiyun compatible = "lsi,nspire-cx-clock"; 22*4882a593Smuzhiyun reg = <0x900B0000 0x4>; 23*4882a593Smuzhiyun clocks = <&base_clk>; 24*4882a593Smuzhiyun}; 25