1*4882a593SmuzhiyunMicrochip PIC32 Clock Controller Binding 2*4882a593Smuzhiyun---------------------------------------- 3*4882a593SmuzhiyunMicrochip clock controller is consists of few oscillators, PLL, multiplexer 4*4882a593Smuzhiyunand few divider modules. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunThis binding uses common clock bindings. 7*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties: 10*4882a593Smuzhiyun- compatible: shall be "microchip,pic32mzda-clk". 11*4882a593Smuzhiyun- reg: shall contain base address and length of clock registers. 12*4882a593Smuzhiyun- #clock-cells: shall be 1. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunOptional properties: 15*4882a593Smuzhiyun- microchip,pic32mzda-sosc: shall be added only if platform has 16*4882a593Smuzhiyun secondary oscillator connected. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExample: 19*4882a593Smuzhiyun rootclk: clock-controller@1f801200 { 20*4882a593Smuzhiyun compatible = "microchip,pic32mzda-clk"; 21*4882a593Smuzhiyun reg = <0x1f801200 0x200>; 22*4882a593Smuzhiyun #clock-cells = <1>; 23*4882a593Smuzhiyun /* optional */ 24*4882a593Smuzhiyun microchip,pic32mzda-sosc; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunThe clock consumer shall specify the desired clock-output of the clock 29*4882a593Smuzhiyuncontroller (as defined in [2]) by specifying output-id in its "clock" 30*4882a593Smuzhiyunphandle cell. 31*4882a593Smuzhiyun[2] include/dt-bindings/clock/microchip,pic32-clock.h 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunFor example for UART2: 34*4882a593Smuzhiyunuart2: serial@2 { 35*4882a593Smuzhiyun compatible = "microchip,pic32mzda-uart"; 36*4882a593Smuzhiyun reg = <>; 37*4882a593Smuzhiyun interrupts = <>; 38*4882a593Smuzhiyun clocks = <&rootclk PB2CLK>; 39*4882a593Smuzhiyun}; 40