1*4882a593Smuzhiyun* Marvell PXA1928 Clock Controllers 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe PXA1928 clock subsystem generates and supplies clock to various 4*4882a593Smuzhiyuncontrollers within the PXA1928 SoC. The PXA1928 contains 3 clock controller 5*4882a593Smuzhiyunblocks called APMU, MPMU, and APBC roughly corresponding to internal buses. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired Properties: 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- compatible: should be one of the following. 10*4882a593Smuzhiyun - "marvell,pxa1928-apmu" - APMU controller compatible 11*4882a593Smuzhiyun - "marvell,pxa1928-mpmu" - MPMU controller compatible 12*4882a593Smuzhiyun - "marvell,pxa1928-apbc" - APBC controller compatible 13*4882a593Smuzhiyun- reg: physical base address of the clock controller and length of memory mapped 14*4882a593Smuzhiyun region. 15*4882a593Smuzhiyun- #clock-cells: should be 1. 16*4882a593Smuzhiyun- #reset-cells: should be 1. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunEach clock is assigned an identifier and client nodes use the clock controller 19*4882a593Smuzhiyunphandle and this identifier to specify the clock which they consume. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunAll these identifiers can be found in <dt-bindings/clock/marvell,pxa1928.h>. 22