1*4882a593SmuzhiyunAXM5516 clock driver bindings 2*4882a593Smuzhiyun----------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties : 5*4882a593Smuzhiyun- compatible : shall contain "lsi,axm5516-clks" 6*4882a593Smuzhiyun- reg : shall contain base register location and length 7*4882a593Smuzhiyun- #clock-cells : shall contain 1 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunThe consumer specifies the desired clock by having the clock ID in its "clocks" 10*4882a593Smuzhiyunphandle cell. See <dt-bindings/clock/lsi,axxia-clock.h> for the list of 11*4882a593Smuzhiyunsupported clock IDs. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun clks: clock-controller@2010020000 { 16*4882a593Smuzhiyun compatible = "lsi,axm5516-clks"; 17*4882a593Smuzhiyun #clock-cells = <1>; 18*4882a593Smuzhiyun reg = <0x20 0x10020000 0 0x20000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun serial0: uart@2010080000 { 22*4882a593Smuzhiyun compatible = "arm,pl011", "arm,primecell"; 23*4882a593Smuzhiyun reg = <0x20 0x10080000 0 0x1000>; 24*4882a593Smuzhiyun interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 25*4882a593Smuzhiyun clocks = <&clks AXXIA_CLK_PER>; 26*4882a593Smuzhiyun clock-names = "apb_pclk"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30