1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/intel,cgu-lgm.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Intel Lightning Mountain SoC's Clock Controller(CGU) Binding 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Rahul Tanwar <rahul.tanwar@linux.intel.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun Lightning Mountain(LGM) SoC's Clock Generation Unit(CGU) driver provides 14*4882a593Smuzhiyun all means to access the CGU hardware module in order to generate a series 15*4882a593Smuzhiyun of clocks for the whole system and individual peripherals. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun Please refer to include/dt-bindings/clock/intel,lgm-clk.h header file, it 18*4882a593Smuzhiyun defines all available clocks as macros. These macros can be used in device 19*4882a593Smuzhiyun tree sources. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunproperties: 22*4882a593Smuzhiyun compatible: 23*4882a593Smuzhiyun const: intel,cgu-lgm 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg: 26*4882a593Smuzhiyun maxItems: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun '#clock-cells': 29*4882a593Smuzhiyun const: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyunrequired: 32*4882a593Smuzhiyun - compatible 33*4882a593Smuzhiyun - reg 34*4882a593Smuzhiyun - '#clock-cells' 35*4882a593Smuzhiyun 36*4882a593SmuzhiyunadditionalProperties: false 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunexamples: 39*4882a593Smuzhiyun - | 40*4882a593Smuzhiyun cgu: clock-controller@e0200000 { 41*4882a593Smuzhiyun compatible = "intel,cgu-lgm"; 42*4882a593Smuzhiyun reg = <0xe0200000 0x33c>; 43*4882a593Smuzhiyun #clock-cells = <1>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun... 47