1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/ingenic,cgu.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Ingenic SoCs CGU devicetree bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: | 10*4882a593Smuzhiyun The CGU in an Ingenic SoC provides all the clocks generated on-chip. It 11*4882a593Smuzhiyun typically includes a variety of PLLs, multiplexers, dividers & gates in order 12*4882a593Smuzhiyun to provide many different clock signals derived from only 2 external source 13*4882a593Smuzhiyun clocks. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunmaintainers: 16*4882a593Smuzhiyun - Paul Cercueil <paul@crapouillou.net> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunselect: 19*4882a593Smuzhiyun properties: 20*4882a593Smuzhiyun compatible: 21*4882a593Smuzhiyun contains: 22*4882a593Smuzhiyun enum: 23*4882a593Smuzhiyun - ingenic,jz4740-cgu 24*4882a593Smuzhiyun - ingenic,jz4725b-cgu 25*4882a593Smuzhiyun - ingenic,jz4770-cgu 26*4882a593Smuzhiyun - ingenic,jz4780-cgu 27*4882a593Smuzhiyun - ingenic,x1000-cgu 28*4882a593Smuzhiyun - ingenic,x1830-cgu 29*4882a593Smuzhiyun required: 30*4882a593Smuzhiyun - compatible 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunproperties: 33*4882a593Smuzhiyun $nodename: 34*4882a593Smuzhiyun pattern: "^clock-controller@[0-9a-f]+$" 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun "#address-cells": 37*4882a593Smuzhiyun const: 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun "#size-cells": 40*4882a593Smuzhiyun const: 1 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun "#clock-cells": 43*4882a593Smuzhiyun const: 1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun ranges: true 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun compatible: 48*4882a593Smuzhiyun items: 49*4882a593Smuzhiyun - enum: 50*4882a593Smuzhiyun - ingenic,jz4740-cgu 51*4882a593Smuzhiyun - ingenic,jz4725b-cgu 52*4882a593Smuzhiyun - ingenic,jz4770-cgu 53*4882a593Smuzhiyun - ingenic,jz4780-cgu 54*4882a593Smuzhiyun - ingenic,x1000-cgu 55*4882a593Smuzhiyun - ingenic,x1830-cgu 56*4882a593Smuzhiyun - const: simple-mfd 57*4882a593Smuzhiyun minItems: 1 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun reg: 60*4882a593Smuzhiyun maxItems: 1 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun clocks: 63*4882a593Smuzhiyun items: 64*4882a593Smuzhiyun - description: External oscillator clock 65*4882a593Smuzhiyun - description: Internal 32 kHz RTC clock 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun clock-names: 68*4882a593Smuzhiyun items: 69*4882a593Smuzhiyun - const: ext 70*4882a593Smuzhiyun - enum: 71*4882a593Smuzhiyun - rtc 72*4882a593Smuzhiyun - osc32k # Different name, same clock 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun assigned-clocks: 75*4882a593Smuzhiyun minItems: 1 76*4882a593Smuzhiyun maxItems: 64 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun assigned-clock-parents: 79*4882a593Smuzhiyun minItems: 1 80*4882a593Smuzhiyun maxItems: 64 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun assigned-clock-rates: 83*4882a593Smuzhiyun minItems: 1 84*4882a593Smuzhiyun maxItems: 64 85*4882a593Smuzhiyun 86*4882a593Smuzhiyunrequired: 87*4882a593Smuzhiyun - "#clock-cells" 88*4882a593Smuzhiyun - compatible 89*4882a593Smuzhiyun - reg 90*4882a593Smuzhiyun - clocks 91*4882a593Smuzhiyun - clock-names 92*4882a593Smuzhiyun 93*4882a593SmuzhiyunpatternProperties: 94*4882a593Smuzhiyun "^usb-phy@[a-f0-9]+$": 95*4882a593Smuzhiyun allOf: [ $ref: "../usb/ingenic,jz4770-phy.yaml#" ] 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunadditionalProperties: false 98*4882a593Smuzhiyun 99*4882a593Smuzhiyunexamples: 100*4882a593Smuzhiyun - | 101*4882a593Smuzhiyun #include <dt-bindings/clock/jz4770-cgu.h> 102*4882a593Smuzhiyun cgu: clock-controller@10000000 { 103*4882a593Smuzhiyun compatible = "ingenic,jz4770-cgu", "simple-mfd"; 104*4882a593Smuzhiyun reg = <0x10000000 0x100>; 105*4882a593Smuzhiyun #address-cells = <1>; 106*4882a593Smuzhiyun #size-cells = <1>; 107*4882a593Smuzhiyun ranges = <0x0 0x10000000 0x100>; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun clocks = <&ext>, <&osc32k>; 110*4882a593Smuzhiyun clock-names = "ext", "osc32k"; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun #clock-cells = <1>; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun otg_phy: usb-phy@3c { 115*4882a593Smuzhiyun compatible = "ingenic,jz4770-phy"; 116*4882a593Smuzhiyun reg = <0x3c 0x10>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun clocks = <&cgu JZ4770_CLK_OTG_PHY>; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun vcc-supply = <&ldo5>; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun #phy-cells = <0>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125