xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/hi3670-clock.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun* Hisilicon Hi3670 Clock Controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe Hi3670 clock controller generates and supplies clock to various
4*4882a593Smuzhiyuncontrollers within the Hi3670 SoC.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunRequired Properties:
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun- compatible: the compatible should be one of the following strings to
9*4882a593Smuzhiyun	indicate the clock controller functionality.
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	- "hisilicon,hi3670-crgctrl"
12*4882a593Smuzhiyun	- "hisilicon,hi3670-pctrl"
13*4882a593Smuzhiyun	- "hisilicon,hi3670-pmuctrl"
14*4882a593Smuzhiyun	- "hisilicon,hi3670-sctrl"
15*4882a593Smuzhiyun	- "hisilicon,hi3670-iomcu"
16*4882a593Smuzhiyun	- "hisilicon,hi3670-media1-crg"
17*4882a593Smuzhiyun	- "hisilicon,hi3670-media2-crg"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped
20*4882a593Smuzhiyun  region.
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22*4882a593Smuzhiyun- #clock-cells: should be 1.
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24*4882a593SmuzhiyunEach clock is assigned an identifier and client nodes use this identifier
25*4882a593Smuzhiyunto specify the clock which they consume.
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunAll these identifier could be found in <dt-bindings/clock/hi3670-clock.h>.
28*4882a593Smuzhiyun
29*4882a593SmuzhiyunExamples:
30*4882a593Smuzhiyun	crg_ctrl: clock-controller@fff35000 {
31*4882a593Smuzhiyun		compatible = "hisilicon,hi3670-crgctrl", "syscon";
32*4882a593Smuzhiyun		reg = <0x0 0xfff35000 0x0 0x1000>;
33*4882a593Smuzhiyun		#clock-cells = <1>;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	uart0: serial@fdf02000 {
37*4882a593Smuzhiyun		compatible = "arm,pl011", "arm,primecell";
38*4882a593Smuzhiyun		reg = <0x0 0xfdf02000 0x0 0x1000>;
39*4882a593Smuzhiyun		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
40*4882a593Smuzhiyun		clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
41*4882a593Smuzhiyun			 <&crg_ctrl HI3670_PCLK>;
42*4882a593Smuzhiyun		clock-names = "uartclk", "apb_pclk";
43*4882a593Smuzhiyun	};
44