1*4882a593Smuzhiyun* Hisilicon Hi3660 Clock Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Hi3660 clock controller generates and supplies clock to various 4*4882a593Smuzhiyuncontrollers within the Hi3660 SoC. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired Properties: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- compatible: the compatible should be one of the following strings to 9*4882a593Smuzhiyun indicate the clock controller functionality. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun - "hisilicon,hi3660-crgctrl" 12*4882a593Smuzhiyun - "hisilicon,hi3660-pctrl" 13*4882a593Smuzhiyun - "hisilicon,hi3660-pmuctrl" 14*4882a593Smuzhiyun - "hisilicon,hi3660-sctrl" 15*4882a593Smuzhiyun - "hisilicon,hi3660-iomcu" 16*4882a593Smuzhiyun - "hisilicon,hi3660-stub-clk" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 19*4882a593Smuzhiyun region. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- #clock-cells: should be 1. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunOptional Properties: 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun- mboxes: Phandle to the mailbox for sending message to MCU. 26*4882a593Smuzhiyun (See: ../mailbox/hisilicon,hi3660-mailbox.txt for more info) 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunEach clock is assigned an identifier and client nodes use this identifier 29*4882a593Smuzhiyunto specify the clock which they consume. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunAll these identifier could be found in <dt-bindings/clock/hi3660-clock.h>. 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunExamples: 34*4882a593Smuzhiyun crg_ctrl: clock-controller@fff35000 { 35*4882a593Smuzhiyun compatible = "hisilicon,hi3660-crgctrl", "syscon"; 36*4882a593Smuzhiyun reg = <0x0 0xfff35000 0x0 0x1000>; 37*4882a593Smuzhiyun #clock-cells = <1>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun uart0: serial@fdf02000 { 41*4882a593Smuzhiyun compatible = "arm,pl011", "arm,primecell"; 42*4882a593Smuzhiyun reg = <0x0 0xfdf02000 0x0 0x1000>; 43*4882a593Smuzhiyun interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 44*4882a593Smuzhiyun clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>, 45*4882a593Smuzhiyun <&crg_ctrl HI3660_PCLK>; 46*4882a593Smuzhiyun clock-names = "uartclk", "apb_pclk"; 47*4882a593Smuzhiyun }; 48