1*4882a593SmuzhiyunBinding for simple memory mapped io fixed-rate clock sources. 2*4882a593SmuzhiyunThe driver reads a clock frequency value from a single 32-bit memory mapped 3*4882a593SmuzhiyunI/O register and registers it as a fixed rate clock. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunIt was designed for test systems, like FPGA, not for complete, finished SoCs. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThis binding uses the common clock binding[1]. 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties: 12*4882a593Smuzhiyun- compatible : shall be "fixed-mmio-clock". 13*4882a593Smuzhiyun- #clock-cells : from common clock binding; shall be set to 0. 14*4882a593Smuzhiyun- reg : Address and length of the clock value register set. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunOptional properties: 17*4882a593Smuzhiyun- clock-output-names : From common clock binding. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunExample: 20*4882a593Smuzhiyunsysclock: sysclock@fd020004 { 21*4882a593Smuzhiyun #clock-cells = <0>; 22*4882a593Smuzhiyun compatible = "fixed-mmio-clock"; 23*4882a593Smuzhiyun reg = <0xfd020004 0x4>; 24*4882a593Smuzhiyun}; 25