1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/cirrus,lochnagar.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Cirrus Logic Lochnagar Audio Development Board 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - patches@opensource.cirrus.com 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun Lochnagar is an evaluation and development board for Cirrus Logic 14*4882a593Smuzhiyun Smart CODEC and Amp devices. It allows the connection of most Cirrus 15*4882a593Smuzhiyun Logic devices on mini-cards, as well as allowing connection of various 16*4882a593Smuzhiyun application processor systems to provide a full evaluation platform. 17*4882a593Smuzhiyun Audio system topology, clocking and power can all be controlled through 18*4882a593Smuzhiyun the Lochnagar, allowing the device under test to be used in a variety of 19*4882a593Smuzhiyun possible use cases. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun This binding document describes the binding for the clock portion of the 22*4882a593Smuzhiyun driver. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun Also see these documents for generic binding information: 25*4882a593Smuzhiyun [1] Clock : ../clock/clock-bindings.txt 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun And these for relevant defines: 28*4882a593Smuzhiyun [2] include/dt-bindings/clock/lochnagar.h 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun This binding must be part of the Lochnagar MFD binding: 31*4882a593Smuzhiyun [3] ../mfd/cirrus,lochnagar.yaml 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunproperties: 34*4882a593Smuzhiyun compatible: 35*4882a593Smuzhiyun enum: 36*4882a593Smuzhiyun - cirrus,lochnagar1-clk 37*4882a593Smuzhiyun - cirrus,lochnagar2-clk 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun '#clock-cells': 40*4882a593Smuzhiyun description: 41*4882a593Smuzhiyun The first cell indicates the clock number, see [2] for available 42*4882a593Smuzhiyun clocks and [1]. 43*4882a593Smuzhiyun const: 1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun clock-names: 46*4882a593Smuzhiyun items: 47*4882a593Smuzhiyun enum: 48*4882a593Smuzhiyun - ln-cdc-clkout # Output clock from CODEC card. 49*4882a593Smuzhiyun - ln-dsp-clkout # Output clock from DSP card. 50*4882a593Smuzhiyun - ln-gf-mclk1 # Optional input clock from host system. 51*4882a593Smuzhiyun - ln-gf-mclk2 # Optional input clock from host system. 52*4882a593Smuzhiyun - ln-gf-mclk3 # Optional input clock from host system. 53*4882a593Smuzhiyun - ln-gf-mclk4 # Optional input clock from host system. 54*4882a593Smuzhiyun - ln-psia1-mclk # Optional input clock from external connector. 55*4882a593Smuzhiyun - ln-psia2-mclk # Optional input clock from external connector. 56*4882a593Smuzhiyun - ln-spdif-mclk # Optional input clock from SPDIF. 57*4882a593Smuzhiyun - ln-spdif-clkout # Optional input clock from SPDIF. 58*4882a593Smuzhiyun - ln-adat-mclk # Optional input clock from ADAT. 59*4882a593Smuzhiyun - ln-pmic-32k # On board fixed clock. 60*4882a593Smuzhiyun - ln-clk-12m # On board fixed clock. 61*4882a593Smuzhiyun - ln-clk-11m # On board fixed clock. 62*4882a593Smuzhiyun - ln-clk-24m # On board fixed clock. 63*4882a593Smuzhiyun - ln-clk-22m # On board fixed clock. 64*4882a593Smuzhiyun - ln-clk-8m # On board fixed clock. 65*4882a593Smuzhiyun - ln-usb-clk-24m # On board fixed clock. 66*4882a593Smuzhiyun - ln-usb-clk-12m # On board fixed clock. 67*4882a593Smuzhiyun minItems: 1 68*4882a593Smuzhiyun maxItems: 19 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun clocks: true 71*4882a593Smuzhiyun assigned-clocks: true 72*4882a593Smuzhiyun assigned-clock-parents: true 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunadditionalProperties: false 75*4882a593Smuzhiyun 76*4882a593Smuzhiyunrequired: 77*4882a593Smuzhiyun - compatible 78*4882a593Smuzhiyun - '#clock-cells' 79