1*4882a593SmuzhiyunBroadcom Kona Family Clocks 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis binding is associated with Broadcom SoCs having "Kona" style 4*4882a593Smuzhiyunclock control units (CCUs). A CCU is a clock provider that manages 5*4882a593Smuzhiyuna set of clock signals. Each CCU is represented by a node in the 6*4882a593Smuzhiyundevice tree. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunThis binding uses the common clock binding: 9*4882a593Smuzhiyun Documentation/devicetree/bindings/clock/clock-bindings.txt 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties: 12*4882a593Smuzhiyun- compatible 13*4882a593Smuzhiyun Shall have a value of the form "brcm,<model>-<which>-ccu", 14*4882a593Smuzhiyun where <model> is a Broadcom SoC model number and <which> is 15*4882a593Smuzhiyun the name of a defined CCU. For example: 16*4882a593Smuzhiyun "brcm,bcm11351-root-ccu" 17*4882a593Smuzhiyun The compatible strings used for each supported SoC family 18*4882a593Smuzhiyun are defined below. 19*4882a593Smuzhiyun- reg 20*4882a593Smuzhiyun Shall define the base and range of the address space 21*4882a593Smuzhiyun containing clock control registers 22*4882a593Smuzhiyun- #clock-cells 23*4882a593Smuzhiyun Shall have value <1>. The permitted clock-specifier values 24*4882a593Smuzhiyun are defined below. 25*4882a593Smuzhiyun- clock-output-names 26*4882a593Smuzhiyun Shall be an ordered list of strings defining the names of 27*4882a593Smuzhiyun the clocks provided by the CCU. 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunDevice tree example: 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun slave_ccu: slave_ccu { 32*4882a593Smuzhiyun compatible = "brcm,bcm11351-slave-ccu"; 33*4882a593Smuzhiyun reg = <0x3e011000 0x0f00>; 34*4882a593Smuzhiyun #clock-cells = <1>; 35*4882a593Smuzhiyun clock-output-names = "uartb", 36*4882a593Smuzhiyun "uartb2", 37*4882a593Smuzhiyun "uartb3", 38*4882a593Smuzhiyun "uartb4"; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun ref_crystal_clk: ref_crystal { 42*4882a593Smuzhiyun #clock-cells = <0>; 43*4882a593Smuzhiyun compatible = "fixed-clock"; 44*4882a593Smuzhiyun clock-frequency = <26000000>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun uart@3e002000 { 48*4882a593Smuzhiyun compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 49*4882a593Smuzhiyun reg = <0x3e002000 0x1000>; 50*4882a593Smuzhiyun clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; 51*4882a593Smuzhiyun interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 52*4882a593Smuzhiyun reg-shift = <2>; 53*4882a593Smuzhiyun reg-io-width = <4>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunBCM281XX family 57*4882a593Smuzhiyun--------------- 58*4882a593SmuzhiyunCCU compatible string values for SoCs in the BCM281XX family are: 59*4882a593Smuzhiyun "brcm,bcm11351-root-ccu" 60*4882a593Smuzhiyun "brcm,bcm11351-aon-ccu" 61*4882a593Smuzhiyun "brcm,bcm11351-hub-ccu" 62*4882a593Smuzhiyun "brcm,bcm11351-master-ccu" 63*4882a593Smuzhiyun "brcm,bcm11351-slave-ccu" 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunThe following table defines the set of CCUs and clock specifiers for 66*4882a593SmuzhiyunBCM281XX family clocks. When a clock consumer references a clocks, 67*4882a593Smuzhiyunits symbolic specifier (rather than its numeric index value) should 68*4882a593Smuzhiyunbe used. These specifiers are defined in: 69*4882a593Smuzhiyun "include/dt-bindings/clock/bcm281xx.h" 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun CCU Clock Type Index Specifier 72*4882a593Smuzhiyun --- ----- ---- ----- --------- 73*4882a593Smuzhiyun root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER 76*4882a593Smuzhiyun aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC 77*4882a593Smuzhiyun aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1 82*4882a593Smuzhiyun master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2 83*4882a593Smuzhiyun master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3 84*4882a593Smuzhiyun master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4 85*4882a593Smuzhiyun master dmac peri 4 BCM281XX_MASTER_CCU_DMAC 86*4882a593Smuzhiyun master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC 87*4882a593Smuzhiyun master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M 88*4882a593Smuzhiyun master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB 91*4882a593Smuzhiyun slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2 92*4882a593Smuzhiyun slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3 93*4882a593Smuzhiyun slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4 94*4882a593Smuzhiyun slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0 95*4882a593Smuzhiyun slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2 96*4882a593Smuzhiyun slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1 97*4882a593Smuzhiyun slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2 98*4882a593Smuzhiyun slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3 99*4882a593Smuzhiyun slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun 102*4882a593SmuzhiyunBCM21664 family 103*4882a593Smuzhiyun--------------- 104*4882a593SmuzhiyunCCU compatible string values for SoCs in the BCM21664 family are: 105*4882a593Smuzhiyun "brcm,bcm21664-root-ccu" 106*4882a593Smuzhiyun "brcm,bcm21664-aon-ccu" 107*4882a593Smuzhiyun "brcm,bcm21664-master-ccu" 108*4882a593Smuzhiyun "brcm,bcm21664-slave-ccu" 109*4882a593Smuzhiyun 110*4882a593SmuzhiyunThe following table defines the set of CCUs and clock specifiers for 111*4882a593SmuzhiyunBCM21664 family clocks. When a clock consumer references a clocks, 112*4882a593Smuzhiyunits symbolic specifier (rather than its numeric index value) should 113*4882a593Smuzhiyunbe used. These specifiers are defined in: 114*4882a593Smuzhiyun "include/dt-bindings/clock/bcm21664.h" 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun CCU Clock Type Index Specifier 117*4882a593Smuzhiyun --- ----- ---- ----- --------- 118*4882a593Smuzhiyun root frac_1m peri 0 BCM21664_ROOT_CCU_FRAC_1M 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun master sdio1 peri 0 BCM21664_MASTER_CCU_SDIO1 123*4882a593Smuzhiyun master sdio2 peri 1 BCM21664_MASTER_CCU_SDIO2 124*4882a593Smuzhiyun master sdio3 peri 2 BCM21664_MASTER_CCU_SDIO3 125*4882a593Smuzhiyun master sdio4 peri 3 BCM21664_MASTER_CCU_SDIO4 126*4882a593Smuzhiyun master sdio1_sleep peri 4 BCM21664_MASTER_CCU_SDIO1_SLEEP 127*4882a593Smuzhiyun master sdio2_sleep peri 5 BCM21664_MASTER_CCU_SDIO2_SLEEP 128*4882a593Smuzhiyun master sdio3_sleep peri 6 BCM21664_MASTER_CCU_SDIO3_SLEEP 129*4882a593Smuzhiyun master sdio4_sleep peri 7 BCM21664_MASTER_CCU_SDIO4_SLEEP 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun slave uartb peri 0 BCM21664_SLAVE_CCU_UARTB 132*4882a593Smuzhiyun slave uartb2 peri 1 BCM21664_SLAVE_CCU_UARTB2 133*4882a593Smuzhiyun slave uartb3 peri 2 BCM21664_SLAVE_CCU_UARTB3 134*4882a593Smuzhiyun slave uartb4 peri 3 BCM21664_SLAVE_CCU_UARTB4 135*4882a593Smuzhiyun slave bsc1 peri 4 BCM21664_SLAVE_CCU_BSC1 136*4882a593Smuzhiyun slave bsc2 peri 5 BCM21664_SLAVE_CCU_BSC2 137*4882a593Smuzhiyun slave bsc3 peri 6 BCM21664_SLAVE_CCU_BSC3 138*4882a593Smuzhiyun slave bsc4 peri 7 BCM21664_SLAVE_CCU_BSC4 139