1*4882a593SmuzhiyunGated Clock Controller Bindings for MIPS based BCM63XX SoCs 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: must be one of: 5*4882a593Smuzhiyun "brcm,bcm3368-clocks" 6*4882a593Smuzhiyun "brcm,bcm6318-clocks" 7*4882a593Smuzhiyun "brcm,bcm6318-ubus-clocks" 8*4882a593Smuzhiyun "brcm,bcm6328-clocks" 9*4882a593Smuzhiyun "brcm,bcm6358-clocks" 10*4882a593Smuzhiyun "brcm,bcm6362-clocks" 11*4882a593Smuzhiyun "brcm,bcm6368-clocks" 12*4882a593Smuzhiyun "brcm,bcm63268-clocks" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- reg: Address and length of the register set 15*4882a593Smuzhiyun- #clock-cells: must be <1> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExample: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunclkctl: clock-controller@10000004 { 21*4882a593Smuzhiyun compatible = "brcm,bcm6328-clocks"; 22*4882a593Smuzhiyun reg = <0x10000004 0x4>; 23*4882a593Smuzhiyun #clock-cells = <1>; 24*4882a593Smuzhiyun}; 25