1*4882a593Smuzhiyun* Xtal Clock bindings for Marvell Armada 37xx SoCs 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunMarvell Armada 37xx SoCs allow to determine the xtal clock frequencies by 4*4882a593Smuzhiyunreading the gpio latch register. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunThis node must be a subnode of the node exposing the register address 7*4882a593Smuzhiyunof the GPIO block where the gpio latch is located. 8*4882a593SmuzhiyunSee Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun- compatible : shall be one of the following: 12*4882a593Smuzhiyun "marvell,armada-3700-xtal-clock" 13*4882a593Smuzhiyun- #clock-cells : from common clock binding; shall be set to 0 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun- clock-output-names : from common clock binding; allows overwrite default clock 17*4882a593Smuzhiyun output names ("xtal") 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunExample: 20*4882a593Smuzhiyunpinctrl_nb: pinctrl-nb@13800 { 21*4882a593Smuzhiyun compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd"; 22*4882a593Smuzhiyun reg = <0x13800 0x100>, <0x13C00 0x20>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun xtalclk: xtal-clk { 25*4882a593Smuzhiyun compatible = "marvell,armada-3700-xtal-clock"; 26*4882a593Smuzhiyun clock-output-names = "xtal"; 27*4882a593Smuzhiyun #clock-cells = <0>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun}; 30