xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Amlogic GXBB Clock and Reset Unit
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe Amlogic GXBB clock controller generates and supplies clock to various
4*4882a593Smuzhiyuncontrollers within the SoC.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunRequired Properties:
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun- compatible: should be:
9*4882a593Smuzhiyun		"amlogic,gxbb-clkc" for GXBB SoC,
10*4882a593Smuzhiyun		"amlogic,gxl-clkc" for GXL and GXM SoC,
11*4882a593Smuzhiyun		"amlogic,axg-clkc" for AXG SoC.
12*4882a593Smuzhiyun		"amlogic,g12a-clkc" for G12A SoC.
13*4882a593Smuzhiyun		"amlogic,g12b-clkc" for G12B SoC.
14*4882a593Smuzhiyun		"amlogic,sm1-clkc" for SM1 SoC.
15*4882a593Smuzhiyun- clocks : list of clock phandle, one for each entry clock-names.
16*4882a593Smuzhiyun- clock-names : should contain the following:
17*4882a593Smuzhiyun  * "xtal": the platform xtal
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun- #clock-cells: should be 1.
20*4882a593Smuzhiyun
21*4882a593SmuzhiyunEach clock is assigned an identifier and client nodes can use this identifier
22*4882a593Smuzhiyunto specify the clock which they consume. All available clocks are defined as
23*4882a593Smuzhiyunpreprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
24*4882a593Smuzhiyunused in device tree sources.
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunParent node should have the following properties :
27*4882a593Smuzhiyun- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
28*4882a593Smuzhiyun              "amlogic,meson-axg-hhi-sysctrl"
29*4882a593Smuzhiyun- reg: base address and size of the HHI system control register space.
30*4882a593Smuzhiyun
31*4882a593SmuzhiyunExample: Clock controller node:
32*4882a593Smuzhiyun
33*4882a593Smuzhiyunsysctrl: system-controller@0 {
34*4882a593Smuzhiyun	compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
35*4882a593Smuzhiyun	reg = <0 0 0 0x400>;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	clkc: clock-controller {
38*4882a593Smuzhiyun		#clock-cells = <1>;
39*4882a593Smuzhiyun		compatible = "amlogic,gxbb-clkc";
40*4882a593Smuzhiyun		clocks = <&xtal>;
41*4882a593Smuzhiyun		clock-names = "xtal";
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593SmuzhiyunExample: UART controller node that consumes the clock generated by the clock
46*4882a593Smuzhiyun  controller:
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	uart_AO: serial@c81004c0 {
49*4882a593Smuzhiyun		compatible = "amlogic,meson-uart";
50*4882a593Smuzhiyun		reg = <0xc81004c0 0x14>;
51*4882a593Smuzhiyun		interrupts = <0 90 1>;
52*4882a593Smuzhiyun		clocks = <&clkc CLKID_CLK81>;
53*4882a593Smuzhiyun	};
54