1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A80 USB PHY Clock Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundeprecated: true
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  "#clock-cells":
17*4882a593Smuzhiyun    const: 1
18*4882a593Smuzhiyun    description: >
19*4882a593Smuzhiyun      The additional ID argument passed to the clock shall refer to
20*4882a593Smuzhiyun      the index of the output.
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  "#reset-cells":
23*4882a593Smuzhiyun    const: 1
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  compatible:
26*4882a593Smuzhiyun    const: allwinner,sun9i-a80-usb-phy-clk
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  reg:
29*4882a593Smuzhiyun    maxItems: 1
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  clocks:
32*4882a593Smuzhiyun    maxItems: 1
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  clock-output-names:
35*4882a593Smuzhiyun    maxItems: 6
36*4882a593Smuzhiyun
37*4882a593Smuzhiyunrequired:
38*4882a593Smuzhiyun  - "#clock-cells"
39*4882a593Smuzhiyun  - "#reset-cells"
40*4882a593Smuzhiyun  - compatible
41*4882a593Smuzhiyun  - reg
42*4882a593Smuzhiyun  - clocks
43*4882a593Smuzhiyun  - clock-output-names
44*4882a593Smuzhiyun
45*4882a593SmuzhiyunadditionalProperties: false
46*4882a593Smuzhiyun
47*4882a593Smuzhiyunexamples:
48*4882a593Smuzhiyun  - |
49*4882a593Smuzhiyun    clk@a08004 {
50*4882a593Smuzhiyun        #clock-cells = <1>;
51*4882a593Smuzhiyun        #reset-cells = <1>;
52*4882a593Smuzhiyun        compatible = "allwinner,sun9i-a80-usb-phy-clk";
53*4882a593Smuzhiyun        reg = <0x00a08004 0x4>;
54*4882a593Smuzhiyun        clocks = <&ahb1_gates 1>;
55*4882a593Smuzhiyun        clock-output-names = "usb_phy0", "usb_hsic1_480M",
56*4882a593Smuzhiyun                             "usb_phy1", "usb_hsic2_480M",
57*4882a593Smuzhiyun                             "usb_phy2", "usb_hsic_12M";
58*4882a593Smuzhiyun    };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun...
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