1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Allwinner A80 APB0 Bus Clock Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chen-Yu Tsai <wens@csie.org> 11*4882a593Smuzhiyun - Maxime Ripard <mripard@kernel.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundeprecated: true 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun "#clock-cells": 17*4882a593Smuzhiyun const: 0 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun enum: 21*4882a593Smuzhiyun - allwinner,sun9i-a80-apb0-clk 22*4882a593Smuzhiyun - allwinner,sun9i-a80-apb1-clk 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks: 28*4882a593Smuzhiyun maxItems: 2 29*4882a593Smuzhiyun description: > 30*4882a593Smuzhiyun The parent order must match the hardware programming order. 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clock-output-names: 33*4882a593Smuzhiyun maxItems: 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyunrequired: 36*4882a593Smuzhiyun - "#clock-cells" 37*4882a593Smuzhiyun - compatible 38*4882a593Smuzhiyun - reg 39*4882a593Smuzhiyun - clocks 40*4882a593Smuzhiyun - clock-output-names 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunadditionalProperties: false 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunexamples: 45*4882a593Smuzhiyun - | 46*4882a593Smuzhiyun clk@6000070 { 47*4882a593Smuzhiyun #clock-cells = <0>; 48*4882a593Smuzhiyun compatible = "allwinner,sun9i-a80-apb0-clk"; 49*4882a593Smuzhiyun reg = <0x06000070 0x4>; 50*4882a593Smuzhiyun clocks = <&osc24M>, <&pll4>; 51*4882a593Smuzhiyun clock-output-names = "apb0"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun - | 55*4882a593Smuzhiyun clk@6000074 { 56*4882a593Smuzhiyun #clock-cells = <0>; 57*4882a593Smuzhiyun compatible = "allwinner,sun9i-a80-apb1-clk"; 58*4882a593Smuzhiyun reg = <0x06000074 0x4>; 59*4882a593Smuzhiyun clocks = <&osc24M>, <&pll4>; 60*4882a593Smuzhiyun clock-output-names = "apb1"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun... 64