1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/bus/arm,integrator-ap-lm.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Integrator/AP Logic Module extension bus 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Linus Walleij <linusw@kernel.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: The Integrator/AP is a prototyping platform and as such has a 13*4882a593Smuzhiyun site for stacking up to four logic modules (LM) designed specifically for 14*4882a593Smuzhiyun use with this platform. A special system controller register can be read to 15*4882a593Smuzhiyun determine if a logic module is connected at index 0, 1, 2 or 3. The logic 16*4882a593Smuzhiyun module connector is described in this binding. The logic modules per se 17*4882a593Smuzhiyun then have their own specific per-module bindings and they will be described 18*4882a593Smuzhiyun as subnodes under this logic module extension bus. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunproperties: 21*4882a593Smuzhiyun "#address-cells": 22*4882a593Smuzhiyun const: 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun "#size-cells": 25*4882a593Smuzhiyun const: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun compatible: 28*4882a593Smuzhiyun items: 29*4882a593Smuzhiyun - const: arm,integrator-ap-lm 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun ranges: true 32*4882a593Smuzhiyun dma-ranges: true 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunpatternProperties: 35*4882a593Smuzhiyun "^bus(@[0-9a-f]*)?$": 36*4882a593Smuzhiyun description: Nodes on the Logic Module bus represent logic modules 37*4882a593Smuzhiyun and are named with bus. The first module is at 0xc0000000, the second 38*4882a593Smuzhiyun at 0xd0000000 and so on until the top of the memory of the system at 39*4882a593Smuzhiyun 0xffffffff. All information about the memory used by the module is 40*4882a593Smuzhiyun in ranges and dma-ranges. 41*4882a593Smuzhiyun type: object 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun required: 44*4882a593Smuzhiyun - compatible 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunrequired: 47*4882a593Smuzhiyun - compatible 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunexamples: 50*4882a593Smuzhiyun - | 51*4882a593Smuzhiyun bus@c0000000 { 52*4882a593Smuzhiyun compatible = "arm,integrator-ap-lm"; 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <1>; 55*4882a593Smuzhiyun ranges = <0xc0000000 0xc0000000 0x40000000>; 56*4882a593Smuzhiyun dma-ranges; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun bus@c0000000 { 59*4882a593Smuzhiyun compatible = "simple-bus"; 60*4882a593Smuzhiyun ranges = <0x00000000 0xc0000000 0x10000000>; 61*4882a593Smuzhiyun /* The Logic Modules sees the Core Module 0 RAM @80000000 */ 62*4882a593Smuzhiyun dma-ranges = <0x00000000 0x80000000 0x10000000>; 63*4882a593Smuzhiyun #address-cells = <1>; 64*4882a593Smuzhiyun #size-cells = <1>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun serial@100000 { 67*4882a593Smuzhiyun compatible = "arm,pl011", "arm,primecell"; 68*4882a593Smuzhiyun reg = <0x00100000 0x1000>; 69*4882a593Smuzhiyun interrupts-extended = <&impd1_vic 1>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun impd1_vic: interrupt-controller@3000000 { 73*4882a593Smuzhiyun compatible = "arm,pl192-vic"; 74*4882a593Smuzhiyun interrupt-controller; 75*4882a593Smuzhiyun #interrupt-cells = <1>; 76*4882a593Smuzhiyun reg = <0x03000000 0x1000>; 77*4882a593Smuzhiyun valid-mask = <0x00000bff>; 78*4882a593Smuzhiyun interrupts-extended = <&pic 9>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593SmuzhiyunadditionalProperties: false 84