1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Allwinner A64 Display Engine Bus Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chen-Yu Tsai <wens@csie.org> 11*4882a593Smuzhiyun - Maxime Ripard <mripard@kernel.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun $nodename: 15*4882a593Smuzhiyun pattern: "^bus(@[0-9a-f]+)?$" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun "#address-cells": 18*4882a593Smuzhiyun const: 1 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun "#size-cells": 21*4882a593Smuzhiyun const: 1 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun compatible: 24*4882a593Smuzhiyun oneOf: 25*4882a593Smuzhiyun - const: allwinner,sun50i-a64-de2 26*4882a593Smuzhiyun - items: 27*4882a593Smuzhiyun - const: allwinner,sun50i-h6-de3 28*4882a593Smuzhiyun - const: allwinner,sun50i-a64-de2 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun reg: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun allwinner,sram: 34*4882a593Smuzhiyun description: 35*4882a593Smuzhiyun The SRAM that needs to be claimed to access the display engine 36*4882a593Smuzhiyun bus. 37*4882a593Smuzhiyun $ref: /schemas/types.yaml#definitions/phandle-array 38*4882a593Smuzhiyun maxItems: 1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun ranges: true 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunpatternProperties: 43*4882a593Smuzhiyun # All other properties should be child nodes with unit-address and 'reg' 44*4882a593Smuzhiyun "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$": 45*4882a593Smuzhiyun type: object 46*4882a593Smuzhiyun properties: 47*4882a593Smuzhiyun reg: 48*4882a593Smuzhiyun maxItems: 1 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun required: 51*4882a593Smuzhiyun - reg 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunrequired: 54*4882a593Smuzhiyun - compatible 55*4882a593Smuzhiyun - reg 56*4882a593Smuzhiyun - "#address-cells" 57*4882a593Smuzhiyun - "#size-cells" 58*4882a593Smuzhiyun - ranges 59*4882a593Smuzhiyun - allwinner,sram 60*4882a593Smuzhiyun 61*4882a593SmuzhiyunadditionalProperties: false 62*4882a593Smuzhiyun 63*4882a593Smuzhiyunexamples: 64*4882a593Smuzhiyun - | 65*4882a593Smuzhiyun bus@1000000 { 66*4882a593Smuzhiyun compatible = "allwinner,sun50i-a64-de2"; 67*4882a593Smuzhiyun reg = <0x1000000 0x400000>; 68*4882a593Smuzhiyun allwinner,sram = <&de2_sram 1>; 69*4882a593Smuzhiyun #address-cells = <1>; 70*4882a593Smuzhiyun #size-cells = <1>; 71*4882a593Smuzhiyun ranges = <0 0x1000000 0x400000>; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun display_clocks: clock@0 { 74*4882a593Smuzhiyun compatible = "allwinner,sun50i-a64-de2-clk"; 75*4882a593Smuzhiyun reg = <0x0 0x100000>; 76*4882a593Smuzhiyun clocks = <&ccu 52>, <&ccu 99>; 77*4882a593Smuzhiyun clock-names = "bus", "mod"; 78*4882a593Smuzhiyun resets = <&ccu 30>; 79*4882a593Smuzhiyun #clock-cells = <1>; 80*4882a593Smuzhiyun #reset-cells = <1>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun... 85