xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/ata/sata_highbank.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/ata/sata_highbank.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Calxeda AHCI SATA Controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyundescription: |
10*4882a593Smuzhiyun  The Calxeda SATA controller mostly conforms to the AHCI interface
11*4882a593Smuzhiyun  with some special extensions to add functionality, to map GPIOs for
12*4882a593Smuzhiyun  activity LEDs and for mapping the ComboPHYs.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyunmaintainers:
15*4882a593Smuzhiyun  - Andre Przywara <andre.przywara@arm.com>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyunproperties:
18*4882a593Smuzhiyun  compatible:
19*4882a593Smuzhiyun    const: calxeda,hb-ahci
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  reg:
22*4882a593Smuzhiyun    maxItems: 1
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  interrupts:
25*4882a593Smuzhiyun    maxItems: 1
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun  dma-coherent: true
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  calxeda,pre-clocks:
30*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
31*4882a593Smuzhiyun    description: |
32*4882a593Smuzhiyun      Indicates the number of additional clock cycles to transmit before
33*4882a593Smuzhiyun      sending an SGPIO pattern.
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  calxeda,post-clocks:
36*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
37*4882a593Smuzhiyun    description: |
38*4882a593Smuzhiyun      Indicates the number of additional clock cycles to transmit after
39*4882a593Smuzhiyun      sending an SGPIO pattern.
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun  calxeda,led-order:
42*4882a593Smuzhiyun    description: Maps port numbers to offsets within the SGPIO bitstream.
43*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32-array
44*4882a593Smuzhiyun    minItems: 1
45*4882a593Smuzhiyun    maxItems: 8
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun  calxeda,port-phys:
48*4882a593Smuzhiyun    description: |
49*4882a593Smuzhiyun      phandle-combophy and lane assignment, which maps each SATA port to a
50*4882a593Smuzhiyun      combophy and a lane within that combophy
51*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle-array
52*4882a593Smuzhiyun    minItems: 1
53*4882a593Smuzhiyun    maxItems: 8
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun  calxeda,tx-atten:
56*4882a593Smuzhiyun    description: |
57*4882a593Smuzhiyun      Contains TX attenuation override codes, one per port.
58*4882a593Smuzhiyun      The upper 24 bits of each entry are always 0 and thus ignored.
59*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32-array
60*4882a593Smuzhiyun    minItems: 1
61*4882a593Smuzhiyun    maxItems: 8
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun  calxeda,sgpio-gpio:
64*4882a593Smuzhiyun    description: |
65*4882a593Smuzhiyun      phandle-gpio bank, bit offset, and default on or off, which indicates
66*4882a593Smuzhiyun      that the driver supports SGPIO indicator lights using the indicated
67*4882a593Smuzhiyun      GPIOs.
68*4882a593Smuzhiyun
69*4882a593Smuzhiyunrequired:
70*4882a593Smuzhiyun  - compatible
71*4882a593Smuzhiyun  - reg
72*4882a593Smuzhiyun  - interrupts
73*4882a593Smuzhiyun
74*4882a593SmuzhiyunadditionalProperties: false
75*4882a593Smuzhiyun
76*4882a593Smuzhiyunexamples:
77*4882a593Smuzhiyun  - |
78*4882a593Smuzhiyun    sata@ffe08000 {
79*4882a593Smuzhiyun        compatible = "calxeda,hb-ahci";
80*4882a593Smuzhiyun        reg = <0xffe08000 0x1000>;
81*4882a593Smuzhiyun        interrupts = <115>;
82*4882a593Smuzhiyun        dma-coherent;
83*4882a593Smuzhiyun        calxeda,port-phys = <&combophy5 0>, <&combophy0 0>, <&combophy0 1>,
84*4882a593Smuzhiyun                             <&combophy0 2>, <&combophy0 3>;
85*4882a593Smuzhiyun        calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>;
86*4882a593Smuzhiyun        calxeda,led-order = <4 0 1 2 3>;
87*4882a593Smuzhiyun        calxeda,tx-atten = <0xff 22 0xff 0xff 23>;
88*4882a593Smuzhiyun        calxeda,pre-clocks = <10>;
89*4882a593Smuzhiyun        calxeda,post-clocks = <0>;
90*4882a593Smuzhiyun    };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun...
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