1*4882a593SmuzhiyunDevice tree binding for the TI DM816 AHCI SATA Controller 2*4882a593Smuzhiyun--------------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun - compatible: must be "ti,dm816-ahci" 6*4882a593Smuzhiyun - reg: physical base address and size of the register region used by 7*4882a593Smuzhiyun the controller (as defined by the AHCI 1.1 standard) 8*4882a593Smuzhiyun - interrupts: interrupt specifier (refer to the interrupt binding) 9*4882a593Smuzhiyun - clocks: list of phandle and clock specifier pairs (or only 10*4882a593Smuzhiyun phandles for clock providers with '0' defined for 11*4882a593Smuzhiyun #clock-cells); two clocks must be specified: the functional 12*4882a593Smuzhiyun clock and an external reference clock 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunExample: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun sata: sata@4a140000 { 17*4882a593Smuzhiyun compatible = "ti,dm816-ahci"; 18*4882a593Smuzhiyun reg = <0x4a140000 0x10000>; 19*4882a593Smuzhiyun interrupts = <16>; 20*4882a593Smuzhiyun clocks = <&sysclk5_ck>, <&sata_refclk>; 21*4882a593Smuzhiyun }; 22