xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/ux500/boards.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunST-Ericsson Ux500 boards
2*4882a593Smuzhiyun------------------------
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunRequired properties (in root node) one of these:
5*4882a593Smuzhiyun	compatible = "st-ericsson,mop500" (legacy)
6*4882a593Smuzhiyun	compatible = "st-ericsson,u8500"
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunRequired node (under root node):
9*4882a593Smuzhiyun
10*4882a593Smuzhiyunsoc: represents the system-on-chip and contains the chip
11*4882a593Smuzhiyunperipherals
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunRequired property of soc node, one of these:
14*4882a593Smuzhiyun	compatible = "stericsson,db8500"
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunRequired subnodes under soc node:
17*4882a593Smuzhiyun
18*4882a593Smuzhiyunbackupram: (used for CPU spin tables and for storing data
19*4882a593Smuzhiyunduring retention, system won't boot without this):
20*4882a593Smuzhiyun	compatible = "ste,dbx500-backupram"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyunscu:
23*4882a593Smuzhiyun	see binding for arm/scu.txt
24*4882a593Smuzhiyun
25*4882a593Smuzhiyuninterrupt-controller:
26*4882a593Smuzhiyun	see binding for interrupt-controller/arm,gic.txt
27*4882a593Smuzhiyun
28*4882a593Smuzhiyuntimer:
29*4882a593Smuzhiyun	see binding for timer/arm,twd.txt
30*4882a593Smuzhiyun
31*4882a593Smuzhiyunclocks:
32*4882a593Smuzhiyun	see binding for clocks/ux500.txt
33*4882a593Smuzhiyun
34*4882a593SmuzhiyunExample:
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun/dts-v1/;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun/ {
39*4882a593Smuzhiyun        model = "ST-Ericsson HREF (pre-v60) and ST UIB";
40*4882a593Smuzhiyun        compatible = "st-ericsson,mop500", "st-ericsson,u8500";
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun        soc {
43*4882a593Smuzhiyun		#address-cells = <1>;
44*4882a593Smuzhiyun		#size-cells = <1>;
45*4882a593Smuzhiyun		compatible = "stericsson,db8500";
46*4882a593Smuzhiyun		interrupt-parent = <&intc>;
47*4882a593Smuzhiyun		ranges;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun		backupram@80150000 {
50*4882a593Smuzhiyun			compatible = "ste,dbx500-backupram";
51*4882a593Smuzhiyun			reg = <0x80150000 0x2000>;
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		intc: interrupt-controller@a0411000 {
55*4882a593Smuzhiyun			compatible = "arm,cortex-a9-gic";
56*4882a593Smuzhiyun			#interrupt-cells = <3>;
57*4882a593Smuzhiyun			#address-cells = <1>;
58*4882a593Smuzhiyun			interrupt-controller;
59*4882a593Smuzhiyun			reg = <0xa0411000 0x1000>,
60*4882a593Smuzhiyun			      <0xa0410100 0x100>;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		scu@a0410000 {
64*4882a593Smuzhiyun			compatible = "arm,cortex-a9-scu";
65*4882a593Smuzhiyun			reg = <0xa0410000 0x100>;
66*4882a593Smuzhiyun		};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		timer@a0410600 {
69*4882a593Smuzhiyun			compatible = "arm,cortex-a9-twd-timer";
70*4882a593Smuzhiyun			reg = <0xa0410600 0x20>;
71*4882a593Smuzhiyun			interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
72*4882a593Smuzhiyun			clocks = <&smp_twd_clk>;
73*4882a593Smuzhiyun		};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		clocks {
76*4882a593Smuzhiyun			compatible = "stericsson,u8500-clks";
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun			smp_twd_clk: smp-twd-clock {
79*4882a593Smuzhiyun				#clock-cells = <0>;
80*4882a593Smuzhiyun			};
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun        };
83*4882a593Smuzhiyun};
84