1*4882a593SmuzhiyunNVIDIA Tegra Activity Monitor 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe activity monitor block collects statistics about the behaviour of other 4*4882a593Smuzhiyuncomponents in the system. This information can be used to derive the rate at 5*4882a593Smuzhiyunwhich the external memory needs to be clocked in order to serve all requests 6*4882a593Smuzhiyunfrom the monitored clients. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- compatible: should be "nvidia,tegra<chip>-actmon" 10*4882a593Smuzhiyun- reg: offset and length of the register set for the device 11*4882a593Smuzhiyun- interrupts: standard interrupt property 12*4882a593Smuzhiyun- clocks: Must contain a phandle and clock specifier pair for each entry in 13*4882a593Smuzhiyunclock-names. See ../../clock/clock-bindings.txt for details. 14*4882a593Smuzhiyun- clock-names: Must include the following entries: 15*4882a593Smuzhiyun - actmon 16*4882a593Smuzhiyun - emc 17*4882a593Smuzhiyun- resets: Must contain an entry for each entry in reset-names. See 18*4882a593Smuzhiyun../../reset/reset.txt for details. 19*4882a593Smuzhiyun- reset-names: Must include the following entries: 20*4882a593Smuzhiyun - actmon 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunExample: 23*4882a593Smuzhiyun actmon@6000c800 { 24*4882a593Smuzhiyun compatible = "nvidia,tegra124-actmon"; 25*4882a593Smuzhiyun reg = <0x0 0x6000c800 0x0 0x400>; 26*4882a593Smuzhiyun interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 27*4882a593Smuzhiyun clocks = <&tegra_car TEGRA124_CLK_ACTMON>, 28*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_EMC>; 29*4882a593Smuzhiyun clock-names = "actmon", "emc"; 30*4882a593Smuzhiyun resets = <&tegra_car 119>; 31*4882a593Smuzhiyun reset-names = "actmon"; 32*4882a593Smuzhiyun }; 33