xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunNVIDIA Tegra Power Management Controller (PMC)
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible: Should contain one of the following:
5*4882a593Smuzhiyun  - "nvidia,tegra186-pmc": for Tegra186
6*4882a593Smuzhiyun  - "nvidia,tegra194-pmc": for Tegra194
7*4882a593Smuzhiyun  - "nvidia,tegra234-pmc": for Tegra234
8*4882a593Smuzhiyun- reg: Must contain an (offset, length) pair of the register set for each
9*4882a593Smuzhiyun  entry in reg-names.
10*4882a593Smuzhiyun- reg-names: Must include the following entries:
11*4882a593Smuzhiyun  - "pmc"
12*4882a593Smuzhiyun  - "wake"
13*4882a593Smuzhiyun  - "aotag"
14*4882a593Smuzhiyun  - "scratch"
15*4882a593Smuzhiyun  - "misc" (Only for Tegra194 and later)
16*4882a593Smuzhiyun
17*4882a593SmuzhiyunOptional properties:
18*4882a593Smuzhiyun- nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
19*4882a593Smuzhiyun- interrupt-controller: Identifies the node as an interrupt controller.
20*4882a593Smuzhiyun- #interrupt-cells: Specifies the number of cells needed to encode an
21*4882a593Smuzhiyun  interrupt source. The value must be 2.
22*4882a593Smuzhiyun
23*4882a593SmuzhiyunExample:
24*4882a593Smuzhiyun
25*4882a593SmuzhiyunSoC DTSI:
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	pmc@c3600000 {
28*4882a593Smuzhiyun		compatible = "nvidia,tegra186-pmc";
29*4882a593Smuzhiyun		reg = <0 0x0c360000 0 0x10000>,
30*4882a593Smuzhiyun		      <0 0x0c370000 0 0x10000>,
31*4882a593Smuzhiyun		      <0 0x0c380000 0 0x10000>,
32*4882a593Smuzhiyun		      <0 0x0c390000 0 0x10000>;
33*4882a593Smuzhiyun		reg-names = "pmc", "wake", "aotag", "scratch";
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593SmuzhiyunBoard DTS:
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	pmc@c360000 {
39*4882a593Smuzhiyun		nvidia,invert-interrupt;
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun== Pad Control ==
43*4882a593Smuzhiyun
44*4882a593SmuzhiyunOn Tegra SoCs a pad is a set of pins which are configured as a group.
45*4882a593SmuzhiyunThe pin grouping is a fixed attribute of the hardware. The PMC can be
46*4882a593Smuzhiyunused to set pad power state and signaling voltage. A pad can be either
47*4882a593Smuzhiyunin active or power down mode. The support for power state and signaling
48*4882a593Smuzhiyunvoltage configuration varies depending on the pad in question. 3.3 V and
49*4882a593Smuzhiyun1.8 V signaling voltages are supported on pins where software
50*4882a593Smuzhiyuncontrollable signaling voltage switching is available.
51*4882a593Smuzhiyun
52*4882a593SmuzhiyunPad configurations are described with pin configuration nodes which
53*4882a593Smuzhiyunare placed under the pmc node and they are referred to by the pinctrl
54*4882a593Smuzhiyunclient properties. For more information see
55*4882a593SmuzhiyunDocumentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
56*4882a593Smuzhiyun
57*4882a593SmuzhiyunThe following pads are present on Tegra186:
58*4882a593Smuzhiyuncsia		csib		dsi		mipi-bias
59*4882a593Smuzhiyunpex-clk-bias	pex-clk3	pex-clk2	pex-clk1
60*4882a593Smuzhiyunusb0		usb1		usb2		usb-bias
61*4882a593Smuzhiyunuart		audio		hsic		dbg
62*4882a593Smuzhiyunhdmi-dp0	hdmi-dp1	pex-cntrl	sdmmc2-hv
63*4882a593Smuzhiyunsdmmc4		cam		dsib		dsic
64*4882a593Smuzhiyundsid		csic		csid		csie
65*4882a593Smuzhiyundsif		spi		ufs		dmic-hv
66*4882a593Smuzhiyunedp		sdmmc1-hv	sdmmc3-hv	conn
67*4882a593Smuzhiyunaudio-hv	ao-hv
68*4882a593Smuzhiyun
69*4882a593SmuzhiyunRequired pin configuration properties:
70*4882a593Smuzhiyun  - pins: A list of strings, each of which contains the name of a pad
71*4882a593Smuzhiyun	  to be configured.
72*4882a593Smuzhiyun
73*4882a593SmuzhiyunOptional pin configuration properties:
74*4882a593Smuzhiyun  - low-power-enable: Configure the pad into power down mode
75*4882a593Smuzhiyun  - low-power-disable: Configure the pad into active mode
76*4882a593Smuzhiyun  - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
77*4882a593Smuzhiyun    TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
78*4882a593Smuzhiyun    The values are defined in
79*4882a593Smuzhiyun    include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
80*4882a593Smuzhiyun
81*4882a593SmuzhiyunNote: The power state can be configured on all of the above pads except
82*4882a593Smuzhiyun      for ao-hv. Following pads have software configurable signaling
83*4882a593Smuzhiyun      voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
84*4882a593Smuzhiyun      ao-hv.
85*4882a593Smuzhiyun
86*4882a593SmuzhiyunPad configuration state example:
87*4882a593Smuzhiyun	pmc: pmc@7000e400 {
88*4882a593Smuzhiyun		compatible = "nvidia,tegra186-pmc";
89*4882a593Smuzhiyun		reg = <0 0x0c360000 0 0x10000>,
90*4882a593Smuzhiyun		      <0 0x0c370000 0 0x10000>,
91*4882a593Smuzhiyun		      <0 0x0c380000 0 0x10000>,
92*4882a593Smuzhiyun		      <0 0x0c390000 0 0x10000>;
93*4882a593Smuzhiyun		reg-names = "pmc", "wake", "aotag", "scratch";
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		...
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		sdmmc1_3v3: sdmmc1-3v3 {
98*4882a593Smuzhiyun			pins = "sdmmc1-hv";
99*4882a593Smuzhiyun			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		sdmmc1_1v8: sdmmc1-1v8 {
103*4882a593Smuzhiyun			pins = "sdmmc1-hv";
104*4882a593Smuzhiyun			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		hdmi_off: hdmi-off {
108*4882a593Smuzhiyun			pins = "hdmi";
109*4882a593Smuzhiyun			low-power-enable;
110*4882a593Smuzhiyun		}
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		hdmi_on: hdmi-on {
113*4882a593Smuzhiyun			pins = "hdmi";
114*4882a593Smuzhiyun			low-power-disable;
115*4882a593Smuzhiyun		}
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593SmuzhiyunPinctrl client example:
119*4882a593Smuzhiyun	sdmmc1: sdhci@3400000 {
120*4882a593Smuzhiyun		...
121*4882a593Smuzhiyun		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
122*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc1_3v3>;
123*4882a593Smuzhiyun		pinctrl-1 = <&sdmmc1_1v8>;
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun	...
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	sor0: sor@15540000 {
129*4882a593Smuzhiyun		...
130*4882a593Smuzhiyun		pinctrl-0 = <&hdmi_off>;
131*4882a593Smuzhiyun		pinctrl-1 = <&hdmi_on>;
132*4882a593Smuzhiyun		pinctrl-names = "hdmi-on", "hdmi-off";
133*4882a593Smuzhiyun	};
134