xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/psci.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/arm/psci.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Power State Coordination Interface (PSCI)
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription: |+
13*4882a593Smuzhiyun  Firmware implementing the PSCI functions described in ARM document number
14*4882a593Smuzhiyun  ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
15*4882a593Smuzhiyun  processors") can be used by Linux to initiate various CPU-centric power
16*4882a593Smuzhiyun  operations.
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun  Issue A of the specification describes functions for CPU suspend, hotplug
19*4882a593Smuzhiyun  and migration of secure software.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  Functions are invoked by trapping to the privilege level of the PSCI
22*4882a593Smuzhiyun  firmware (specified as part of the binding below) and passing arguments
23*4882a593Smuzhiyun  in a manner similar to that specified by AAPCS:
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun     r0       => 32-bit Function ID / return value
26*4882a593Smuzhiyun    {r1 - r3}	=> Parameters
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  Note that the immediate field of the trapping instruction must be set
29*4882a593Smuzhiyun  to #0.
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  [2] Power State Coordination Interface (PSCI) specification
32*4882a593Smuzhiyun    http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
33*4882a593Smuzhiyun
34*4882a593Smuzhiyunproperties:
35*4882a593Smuzhiyun  $nodename:
36*4882a593Smuzhiyun    const: psci
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  compatible:
39*4882a593Smuzhiyun    oneOf:
40*4882a593Smuzhiyun      - description:
41*4882a593Smuzhiyun          For implementations complying to PSCI versions prior to 0.2.
42*4882a593Smuzhiyun        const: arm,psci
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun      - description:
45*4882a593Smuzhiyun          For implementations complying to PSCI 0.2.
46*4882a593Smuzhiyun        const: arm,psci-0.2
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun      - description:
49*4882a593Smuzhiyun          For implementations complying to PSCI 0.2.
50*4882a593Smuzhiyun          Function IDs are not required and should be ignored by an OS with
51*4882a593Smuzhiyun          PSCI 0.2 support, but are permitted to be present for compatibility
52*4882a593Smuzhiyun          with existing software when "arm,psci" is later in the compatible
53*4882a593Smuzhiyun          list.
54*4882a593Smuzhiyun        items:
55*4882a593Smuzhiyun          - const: arm,psci-0.2
56*4882a593Smuzhiyun          - const: arm,psci
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun      - description:
59*4882a593Smuzhiyun          For implementations complying to PSCI 1.0.
60*4882a593Smuzhiyun        const: arm,psci-1.0
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun      - description:
63*4882a593Smuzhiyun          For implementations complying to PSCI 1.0.
64*4882a593Smuzhiyun          PSCI 1.0 is backward compatible with PSCI 0.2 with minor
65*4882a593Smuzhiyun          specification updates, as defined in the PSCI specification[2].
66*4882a593Smuzhiyun        items:
67*4882a593Smuzhiyun          - const: arm,psci-1.0
68*4882a593Smuzhiyun          - const: arm,psci-0.2
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun  method:
71*4882a593Smuzhiyun    description: The method of calling the PSCI firmware.
72*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/string-array
73*4882a593Smuzhiyun    enum:
74*4882a593Smuzhiyun      - smc
75*4882a593Smuzhiyun      # HVC #0, with the register assignments specified in this binding.
76*4882a593Smuzhiyun      - hvc
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun  cpu_suspend:
79*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
80*4882a593Smuzhiyun    description: Function ID for CPU_SUSPEND operation
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun  cpu_off:
83*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
84*4882a593Smuzhiyun    description: Function ID for CPU_OFF operation
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun  cpu_on:
87*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
88*4882a593Smuzhiyun    description: Function ID for CPU_ON operation
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun  migrate:
91*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
92*4882a593Smuzhiyun    description: Function ID for MIGRATE operation
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun  arm,psci-suspend-param:
95*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
96*4882a593Smuzhiyun    description: |
97*4882a593Smuzhiyun      power_state parameter to pass to the PSCI suspend call.
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun      Device tree nodes that require usage of PSCI CPU_SUSPEND function (ie
100*4882a593Smuzhiyun      idle state nodes with entry-method property is set to "psci", as per
101*4882a593Smuzhiyun      bindings in [1]) must specify this property.
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun      [1] Kernel documentation - ARM idle states bindings
104*4882a593Smuzhiyun        Documentation/devicetree/bindings/arm/idle-states.yaml
105*4882a593Smuzhiyun
106*4882a593SmuzhiyunpatternProperties:
107*4882a593Smuzhiyun  "^power-domain-":
108*4882a593Smuzhiyun    $ref: "../power/power-domain.yaml#"
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun    type: object
111*4882a593Smuzhiyun    description: |
112*4882a593Smuzhiyun      ARM systems can have multiple cores, sometimes in an hierarchical
113*4882a593Smuzhiyun      arrangement. This often, but not always, maps directly to the processor
114*4882a593Smuzhiyun      power topology of the system. Individual nodes in a topology have their
115*4882a593Smuzhiyun      own specific power states and can be better represented hierarchically.
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun      For these cases, the definitions of the idle states for the CPUs and the
118*4882a593Smuzhiyun      CPU topology, must conform to the binding in [3]. The idle states
119*4882a593Smuzhiyun      themselves must conform to the binding in [4] and must specify the
120*4882a593Smuzhiyun      arm,psci-suspend-param property.
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun      It should also be noted that, in PSCI firmware v1.0 the OS-Initiated
123*4882a593Smuzhiyun      (OSI) CPU suspend mode is introduced. Using a hierarchical representation
124*4882a593Smuzhiyun      helps to implement support for OSI mode and OS implementations may choose
125*4882a593Smuzhiyun      to mandate it.
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun      [3] Documentation/devicetree/bindings/power/power-domain.yaml
128*4882a593Smuzhiyun      [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
129*4882a593Smuzhiyun
130*4882a593Smuzhiyunrequired:
131*4882a593Smuzhiyun  - compatible
132*4882a593Smuzhiyun  - method
133*4882a593Smuzhiyun
134*4882a593SmuzhiyunallOf:
135*4882a593Smuzhiyun  - if:
136*4882a593Smuzhiyun      properties:
137*4882a593Smuzhiyun        compatible:
138*4882a593Smuzhiyun          contains:
139*4882a593Smuzhiyun            const: arm,psci
140*4882a593Smuzhiyun    then:
141*4882a593Smuzhiyun      required:
142*4882a593Smuzhiyun        - cpu_off
143*4882a593Smuzhiyun        - cpu_on
144*4882a593Smuzhiyun
145*4882a593SmuzhiyunadditionalProperties: false
146*4882a593Smuzhiyun
147*4882a593Smuzhiyunexamples:
148*4882a593Smuzhiyun  - |+
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun    // Case 1: PSCI v0.1 only.
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun    psci {
153*4882a593Smuzhiyun      compatible      = "arm,psci";
154*4882a593Smuzhiyun      method          = "smc";
155*4882a593Smuzhiyun      cpu_suspend     = <0x95c10000>;
156*4882a593Smuzhiyun      cpu_off         = <0x95c10001>;
157*4882a593Smuzhiyun      cpu_on          = <0x95c10002>;
158*4882a593Smuzhiyun      migrate         = <0x95c10003>;
159*4882a593Smuzhiyun    };
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun  - |+
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun    // Case 2: PSCI v0.2 only
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun    psci {
166*4882a593Smuzhiyun      compatible      = "arm,psci-0.2";
167*4882a593Smuzhiyun      method          = "smc";
168*4882a593Smuzhiyun    };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun  - |+
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun    // Case 3: PSCI v0.2 and PSCI v0.1.
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun    /*
176*4882a593Smuzhiyun     * A DTB may provide IDs for use by kernels without PSCI 0.2 support,
177*4882a593Smuzhiyun     * enabling firmware and hypervisors to support existing and new kernels.
178*4882a593Smuzhiyun     * These IDs will be ignored by kernels with PSCI 0.2 support, which will
179*4882a593Smuzhiyun     * use the standard PSCI 0.2 IDs exclusively.
180*4882a593Smuzhiyun     */
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun    psci {
183*4882a593Smuzhiyun      compatible = "arm,psci-0.2", "arm,psci";
184*4882a593Smuzhiyun      method = "hvc";
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun      cpu_on = <0x95c10002>;
187*4882a593Smuzhiyun      cpu_off = <0x95c10001>;
188*4882a593Smuzhiyun    };
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun  - |+
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun    // Case 4: CPUs and CPU idle states described using the hierarchical model.
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun    cpus {
195*4882a593Smuzhiyun      #size-cells = <0>;
196*4882a593Smuzhiyun      #address-cells = <1>;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun      CPU0: cpu@0 {
199*4882a593Smuzhiyun        device_type = "cpu";
200*4882a593Smuzhiyun        compatible = "arm,cortex-a53";
201*4882a593Smuzhiyun        reg = <0x0>;
202*4882a593Smuzhiyun        enable-method = "psci";
203*4882a593Smuzhiyun        power-domains = <&CPU_PD0>;
204*4882a593Smuzhiyun        power-domain-names = "psci";
205*4882a593Smuzhiyun      };
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun      CPU1: cpu@1 {
208*4882a593Smuzhiyun        device_type = "cpu";
209*4882a593Smuzhiyun        compatible = "arm,cortex-a53";
210*4882a593Smuzhiyun        reg = <0x100>;
211*4882a593Smuzhiyun        enable-method = "psci";
212*4882a593Smuzhiyun        power-domains = <&CPU_PD1>;
213*4882a593Smuzhiyun        power-domain-names = "psci";
214*4882a593Smuzhiyun      };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun      idle-states {
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun        CPU_PWRDN: cpu-power-down {
219*4882a593Smuzhiyun          compatible = "arm,idle-state";
220*4882a593Smuzhiyun          arm,psci-suspend-param = <0x0000001>;
221*4882a593Smuzhiyun          entry-latency-us = <10>;
222*4882a593Smuzhiyun          exit-latency-us = <10>;
223*4882a593Smuzhiyun          min-residency-us = <100>;
224*4882a593Smuzhiyun        };
225*4882a593Smuzhiyun      };
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun      domain-idle-states {
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun        CLUSTER_RET: cluster-retention {
230*4882a593Smuzhiyun          compatible = "domain-idle-state";
231*4882a593Smuzhiyun          arm,psci-suspend-param = <0x1000011>;
232*4882a593Smuzhiyun          entry-latency-us = <500>;
233*4882a593Smuzhiyun          exit-latency-us = <500>;
234*4882a593Smuzhiyun          min-residency-us = <2000>;
235*4882a593Smuzhiyun        };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun        CLUSTER_PWRDN: cluster-power-down {
238*4882a593Smuzhiyun          compatible = "domain-idle-state";
239*4882a593Smuzhiyun          arm,psci-suspend-param = <0x1000031>;
240*4882a593Smuzhiyun          entry-latency-us = <2000>;
241*4882a593Smuzhiyun          exit-latency-us = <2000>;
242*4882a593Smuzhiyun          min-residency-us = <6000>;
243*4882a593Smuzhiyun        };
244*4882a593Smuzhiyun      };
245*4882a593Smuzhiyun    };
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun    psci {
248*4882a593Smuzhiyun      compatible = "arm,psci-1.0";
249*4882a593Smuzhiyun      method = "smc";
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun      CPU_PD0: power-domain-cpu0 {
252*4882a593Smuzhiyun        #power-domain-cells = <0>;
253*4882a593Smuzhiyun        domain-idle-states = <&CPU_PWRDN>;
254*4882a593Smuzhiyun        power-domains = <&CLUSTER_PD>;
255*4882a593Smuzhiyun      };
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun      CPU_PD1: power-domain-cpu1 {
258*4882a593Smuzhiyun        #power-domain-cells = <0>;
259*4882a593Smuzhiyun        domain-idle-states =  <&CPU_PWRDN>;
260*4882a593Smuzhiyun        power-domains = <&CLUSTER_PD>;
261*4882a593Smuzhiyun      };
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun      CLUSTER_PD: power-domain-cluster {
264*4882a593Smuzhiyun        #power-domain-cells = <0>;
265*4882a593Smuzhiyun        domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
266*4882a593Smuzhiyun      };
267*4882a593Smuzhiyun    };
268*4882a593Smuzhiyun...
269