1*4882a593SmuzhiyunPicochip picoXcell device tree bindings. 2*4882a593Smuzhiyun======================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired root node properties: 5*4882a593Smuzhiyun - compatible: 6*4882a593Smuzhiyun - "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device. 7*4882a593Smuzhiyun - "picochip,pc7302-pc3x2" : PC7302 development board with PC3X2 device. 8*4882a593Smuzhiyun - "picochip,pc3x3" : picoXcell PC3X3 device based board. 9*4882a593Smuzhiyun - "picochip,pc3x2" : picoXcell PC3X2 device based board. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunTimers required properties: 12*4882a593Smuzhiyun - compatible = "picochip,pc3x2-timer" 13*4882a593Smuzhiyun - interrupts : The single IRQ line for the timer. 14*4882a593Smuzhiyun - clock-freq : The frequency in HZ of the timer. 15*4882a593Smuzhiyun - reg : The register bank for the timer. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunNote: two timers are required - one for the scheduler clock and one for the 18*4882a593Smuzhiyunevent tick/NOHZ. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunVIC required properties: 21*4882a593Smuzhiyun - compatible = "arm,pl192-vic". 22*4882a593Smuzhiyun - interrupt-controller. 23*4882a593Smuzhiyun - reg : The register bank for the device. 24*4882a593Smuzhiyun - #interrupt-cells : Must be 1. 25